--- upstream/dynamips-0.2.6-RC2/dev_c3600_iofpga.c	2007/10/06 16:05:34	3
+++ upstream/dynamips-0.2.7-RC1/dev_c3600_iofpga.c	2007/10/06 16:23:47	7
@@ -15,7 +15,8 @@
 #include <pthread.h>
 
 #include "ptask.h"
-#include "mips64.h"
+#include "cpu.h"
+#include "vm.h"
 #include "dynamips.h"
 #include "memory.h"
 #include "device.h"
@@ -150,7 +151,7 @@
  * dev_c3620_c3640_iofpga_access()
  */
 static void *
-dev_c3620_c3640_iofpga_access(cpu_mips_t *cpu,struct vdevice *dev,
+dev_c3620_c3640_iofpga_access(cpu_gen_t *cpu,struct vdevice *dev,
                               m_uint32_t offset,u_int op_size,u_int op_type,
                               m_uint64_t *data)
 {
@@ -164,11 +165,11 @@
    if (offset != 0x0c) {
       if (op_type == MTS_READ) {
          cpu_log(cpu,"IO_FPGA","reading reg 0x%x at pc=0x%llx (size=%u)\n",
-                 offset,cpu->pc,op_size);
+                 offset,cpu_get_pc(cpu),op_size);
       } else {
          cpu_log(cpu,"IO_FPGA",
                  "writing reg 0x%x at pc=0x%llx, data=0x%llx (size=%u)\n",
-                 offset,cpu->pc,*data,op_size);
+                 offset,cpu_get_pc(cpu),*data,op_size);
       }
    }
 #endif
@@ -288,8 +289,10 @@
             d->io_mask = *data;
          break;
 
-      /* ??? */
-      /* 0: 3640, 4 << 5: 3620, 3 << 5: 3660 */
+      /* 
+       * Platform type ?
+       * 0: 3640, 4 << 5: 3620, 3 << 5: 3660 
+       */
       case 0x30000:
          if (op_type == MTS_READ) {
             switch(c3600_chassis_get_id(d->router)) {
@@ -337,11 +340,12 @@
          if (op_type == MTS_READ) {
             cpu_log(cpu,"IO_FPGA",
                     "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n",
-                    offset,cpu->pc,op_size);
+                    offset,cpu_get_pc(cpu),op_size);
          } else {
             cpu_log(cpu,"IO_FPGA",
                     "write to unknown addr 0x%x, value=0x%llx, "
-                    "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size);
+                    "pc=0x%llx (size=%u)\n",
+                    offset,*data,cpu_get_pc(cpu),op_size);
          }
 #endif
    }
@@ -353,7 +357,7 @@
  * dev_c3660_iofpga_access()
  */
 static void *
-dev_c3660_iofpga_access(cpu_mips_t *cpu,struct vdevice *dev,
+dev_c3660_iofpga_access(cpu_gen_t *cpu,struct vdevice *dev,
                         m_uint32_t offset,u_int op_size,u_int op_type,
                         m_uint64_t *data)
 {
@@ -367,11 +371,11 @@
    if (offset != 0x0c) {
       if (op_type == MTS_READ) {
          cpu_log(cpu,"IO_FPGA","reading reg 0x%x at pc=0x%llx (size=%u)\n",
-                 offset,cpu->pc,op_size);
+                 offset,cpu_get_pc(cpu),op_size);
       } else {
          cpu_log(cpu,"IO_FPGA",
                  "writing reg 0x%x at pc=0x%llx, data=0x%llx (size=%u)\n",
-                 offset,cpu->pc,*data,op_size);
+                 offset,cpu_get_pc(cpu),*data,op_size);
       }
    }
 #endif
@@ -581,11 +585,12 @@
          if (op_type == MTS_READ) {
             cpu_log(cpu,"IO_FPGA",
                     "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n",
-                    offset,cpu->pc,op_size);
+                    offset,cpu_get_pc(cpu),op_size);
          } else {
             cpu_log(cpu,"IO_FPGA",
                     "write to unknown addr 0x%x, value=0x%llx, "
-                    "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size);
+                    "pc=0x%llx (size=%u)\n",
+                    offset,*data,cpu_get_pc(cpu),op_size);
          }
 #endif
    }