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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr) |
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* |
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* PPC32 JIT compiler. |
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*/ |
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#ifndef __PPC32_JIT_H__ |
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#define __PPC32_JIT_H__ |
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#include "utils.h" |
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dpavlin |
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#include "sbox.h" |
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dpavlin |
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/* Size of executable page area (in Mb) */ |
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#ifndef __CYGWIN__ |
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#define PPC_EXEC_AREA_SIZE 64 |
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#else |
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#define PPC_EXEC_AREA_SIZE 16 |
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#endif |
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/* Buffer size for JIT code generation */ |
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#define PPC_JIT_BUFSIZE 32768 |
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/* Maximum number of X86 chunks */ |
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#define PPC_JIT_MAX_CHUNKS 32 |
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/* Size of hash for IA lookup */ |
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#define PPC_JIT_IA_HASH_BITS 17 |
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#define PPC_JIT_IA_HASH_MASK ((1 << PPC_JIT_IA_HASH_BITS) - 1) |
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#define PPC_JIT_IA_HASH_SIZE (1 << PPC_JIT_IA_HASH_BITS) |
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/* Size of hash for physical lookup */ |
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#define PPC_JIT_PHYS_HASH_BITS 16 |
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#define PPC_JIT_PHYS_HASH_MASK ((1 << PPC_JIT_PHYS_HASH_BITS) - 1) |
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#define PPC_JIT_PHYS_HASH_SIZE (1 << PPC_JIT_PHYS_HASH_BITS) |
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dpavlin |
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/* Instruction jump patch */ |
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struct ppc32_insn_patch { |
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u_char *jit_insn; |
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m_uint64_t ppc_ia; |
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}; |
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/* Instruction patch table */ |
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#define PPC32_INSN_PATCH_TABLE_SIZE 32 |
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struct ppc32_jit_patch_table { |
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struct ppc32_insn_patch patches[PPC32_INSN_PATCH_TABLE_SIZE]; |
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u_int cur_patch; |
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struct ppc32_jit_patch_table *next; |
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}; |
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/* PPC32 translated code block */ |
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struct ppc32_jit_tcb { |
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m_uint32_t start_ia; |
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u_char **jit_insn_ptr; |
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m_uint64_t acc_count; |
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ppc_insn_t *ppc_code; |
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u_int ppc_trans_pos; |
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u_int jit_chunk_pos; |
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u_char *jit_ptr; |
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insn_exec_page_t *jit_buffer; |
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insn_exec_page_t *jit_chunks[PPC_JIT_MAX_CHUNKS]; |
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struct ppc32_jit_patch_table *patch_table; |
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ppc32_jit_tcb_t *prev,*next; |
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m_uint32_t phys_page; |
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m_uint32_t phys_hash; |
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ppc32_jit_tcb_t **phys_pprev,*phys_next; |
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#if DEBUG_BLOCK_TIMESTAMP |
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m_uint64_t tm_first_use,tm_last_use; |
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#endif |
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}; |
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/* PPC instruction recognition */ |
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struct ppc32_insn_tag { |
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int (*emit)(cpu_ppc_t *cpu,ppc32_jit_tcb_t *,ppc_insn_t); |
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m_uint32_t mask,value; |
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}; |
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/* Get the JIT instruction pointer in a translated block */ |
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static forced_inline |
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u_char *ppc32_jit_tcb_get_host_ptr(ppc32_jit_tcb_t *b,m_uint32_t vaddr) |
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{ |
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m_uint32_t offset; |
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offset = (vaddr & PPC32_MIN_PAGE_IMASK) >> 2; |
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return(b->jit_insn_ptr[offset]); |
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} |
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/* Check if the specified address belongs to the specified block */ |
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static forced_inline |
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int ppc32_jit_tcb_local_addr(ppc32_jit_tcb_t *block,m_uint32_t vaddr, |
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u_char **jit_addr) |
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{ |
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if ((vaddr & PPC32_MIN_PAGE_MASK) == block->start_ia) { |
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*jit_addr = ppc32_jit_tcb_get_host_ptr(block,vaddr); |
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return(1); |
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} |
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return(0); |
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} |
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/* Check if PC register matches the compiled block virtual address */ |
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static forced_inline |
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int ppc32_jit_tcb_match(cpu_ppc_t *cpu,ppc32_jit_tcb_t *block) |
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{ |
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m_uint32_t vpage; |
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vpage = cpu->ia & ~PPC32_MIN_PAGE_IMASK; |
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return(block->start_ia == vpage); |
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} |
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/* Compute the hash index for the specified IA value */ |
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static forced_inline m_uint32_t ppc32_jit_get_ia_hash(m_uint32_t ia) |
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{ |
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m_uint32_t page_hash; |
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page_hash = sbox_u32(ia >> PPC32_MIN_PAGE_SHIFT); |
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return((page_hash ^ (page_hash >> 14)) & PPC_JIT_IA_HASH_MASK); |
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} |
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/* Compute the hash index for the specified physical page */ |
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static forced_inline m_uint32_t ppc32_jit_get_phys_hash(m_uint32_t phys_page) |
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{ |
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m_uint32_t page_hash; |
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page_hash = sbox_u32(phys_page); |
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return((page_hash ^ (page_hash >> 12)) & PPC_JIT_PHYS_HASH_MASK); |
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} |
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/* Find the JIT block matching a physical page */ |
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static inline ppc32_jit_tcb_t * |
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ppc32_jit_find_by_phys_page(cpu_ppc_t *cpu,m_uint32_t phys_page) |
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{ |
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m_uint32_t page_hash = ppc32_jit_get_phys_hash(phys_page); |
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ppc32_jit_tcb_t *block; |
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for(block=cpu->exec_phys_map[page_hash];block;block=block->phys_next) |
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if (block->phys_page == phys_page) |
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return block; |
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return NULL; |
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} |
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/* Virtual Breakpoint */ |
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void ppc32_emit_breakpoint(ppc32_jit_tcb_t *b); |
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/* Initialize instruction lookup table */ |
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void ppc32_jit_create_ilt(void); |
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/* Initialize the JIT structure */ |
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int ppc32_jit_init(cpu_ppc_t *cpu); |
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/* Flush the JIT */ |
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u_int ppc32_jit_flush(cpu_ppc_t *cpu,u_int threshold); |
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/* Shutdown the JIT */ |
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void ppc32_jit_shutdown(cpu_ppc_t *cpu); |
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/* Fetch a PowerPC instruction and emit corresponding translated code */ |
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struct ppc32_insn_tag *ppc32_jit_fetch_and_emit(cpu_ppc_t *cpu, |
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ppc32_jit_tcb_t *block); |
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/* Record a patch to apply in a compiled block */ |
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int ppc32_jit_tcb_record_patch(ppc32_jit_tcb_t *block,u_char *jit_ptr, |
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m_uint32_t vaddr); |
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/* Free an instruction block */ |
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void ppc32_jit_tcb_free(cpu_ppc_t *cpu,ppc32_jit_tcb_t *block, |
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int list_removal); |
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/* Check if the specified address belongs to the specified block */ |
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int ppc32_jit_tcb_local_addr(ppc32_jit_tcb_t *block,m_uint32_t vaddr, |
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u_char **jit_addr); |
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/* Execute compiled PowerPC code */ |
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void *ppc32_jit_run_cpu(cpu_gen_t *gen); |
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#endif |