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/* |
/* |
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* Cisco C7200 (Predator) Remote Control Module. |
* Cisco router simulation platform. |
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* Copyright (C) 2006 Christophe Fillot. All rights reserved. |
* Copyright (C) 2006 Christophe Fillot. All rights reserved. |
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* |
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* Remote control module. |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include <assert.h> |
#include <assert.h> |
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#include "utils.h" |
#include "utils.h" |
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#include "mips64.h" |
#include "cpu.h" |
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#include "cp0.h" |
#include "vm.h" |
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#include "dynamips.h" |
#include "dynamips.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "device.h" |
#include "device.h" |
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#include "net_io.h" |
#include "net_io.h" |
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#include "registry.h" |
#include "registry.h" |
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#include "ptask.h" |
#include "ptask.h" |
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#include "vm.h" |
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#include "dev_c7200.h" |
#include "dev_c7200.h" |
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#include "dev_c3600.h" |
#include "dev_c3600.h" |
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#include "dev_c2691.h" |
#include "dev_c2691.h" |
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#include "dev_c3725.h" |
#include "dev_c3725.h" |
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#include "dev_c3745.h" |
#include "dev_c3745.h" |
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#include "dev_c2600.h" |
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#define DEBUG_ACCESS 0 |
#define DEBUG_ACCESS 0 |
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char buffer[512]; |
char buffer[512]; |
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u_int buf_pos; |
u_int buf_pos; |
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u_int cookie_pos; |
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}; |
}; |
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/* |
/* |
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* dev_remote_control_access() |
* dev_remote_control_access() |
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*/ |
*/ |
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void *dev_remote_control_access(cpu_mips_t *cpu,struct vdevice *dev, |
void *dev_remote_control_access(cpu_gen_t *cpu,struct vdevice *dev, |
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m_uint32_t offset,u_int op_size,u_int op_type, |
m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
m_uint64_t *data) |
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{ |
{ |
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vm_instance_t *vm = cpu->vm; |
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struct remote_data *d = dev->priv_data; |
struct remote_data *d = dev->priv_data; |
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struct vdevice *storage_dev; |
struct vdevice *storage_dev; |
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size_t len; |
size_t len; |
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#if DEBUG_ACCESS |
#if DEBUG_ACCESS |
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if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
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cpu_log(cpu,"REMOTE","reading reg 0x%x at pc=0x%llx\n",offset,cpu->pc); |
cpu_log(cpu,"REMOTE","reading reg 0x%x at pc=0x%llx\n", |
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offset,cpu_get_pc(cpu)); |
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} else { |
} else { |
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cpu_log(cpu,"REMOTE","writing reg 0x%x at pc=0x%llx, data=0x%llx\n", |
cpu_log(cpu,"REMOTE","writing reg 0x%x at pc=0x%llx, data=0x%llx\n", |
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offset,cpu->pc,*data); |
offset,cpu_get_pc(cpu),*data); |
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} |
} |
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#endif |
#endif |
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/* Display CPU registers */ |
/* Display CPU registers */ |
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case 0x008: |
case 0x008: |
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if (op_type == MTS_WRITE) |
if (op_type == MTS_WRITE) |
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mips64_dump_regs(cpu); |
cpu->reg_dump(cpu); |
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break; |
break; |
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|
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/* Display CPU TLB */ |
/* Display CPU memory info */ |
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case 0x00c: |
case 0x00c: |
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if (op_type == MTS_WRITE) |
if (op_type == MTS_WRITE) |
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tlb_dump(cpu); |
cpu->mmu_dump(cpu); |
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break; |
break; |
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/* Reserved/Unused */ |
/* Reserved/Unused */ |
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/* RAM size */ |
/* RAM size */ |
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case 0x014: |
case 0x014: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->ram_size; |
*data = vm->ram_size; |
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break; |
break; |
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|
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/* ROM size */ |
/* ROM size */ |
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case 0x018: |
case 0x018: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->rom_size; |
*data = vm->rom_size; |
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break; |
break; |
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/* NVRAM size */ |
/* NVRAM size */ |
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case 0x01c: |
case 0x01c: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->nvram_size; |
*data = vm->nvram_size; |
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break; |
break; |
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/* IOMEM size */ |
/* IOMEM size */ |
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case 0x020: |
case 0x020: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->iomem_size; |
*data = vm->iomem_size; |
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break; |
break; |
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/* Config Register */ |
/* Config Register */ |
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case 0x024: |
case 0x024: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->conf_reg; |
*data = vm->conf_reg; |
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break; |
break; |
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/* ELF entry point */ |
/* ELF entry point */ |
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case 0x028: |
case 0x028: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->ios_entry_point; |
*data = vm->ios_entry_point; |
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break; |
break; |
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/* ELF machine id */ |
/* ELF machine id */ |
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case 0x02c: |
case 0x02c: |
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if (op_type == MTS_READ) |
if (op_type == MTS_READ) |
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*data = cpu->vm->elf_machine_id; |
*data = vm->elf_machine_id; |
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break; |
break; |
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/* Restart IOS Image */ |
/* Restart IOS Image */ |
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/* Stop the virtual machine */ |
/* Stop the virtual machine */ |
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case 0x034: |
case 0x034: |
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cpu->vm->status = VM_STATUS_SHUTDOWN; |
vm->status = VM_STATUS_SHUTDOWN; |
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break; |
break; |
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/* Debugging/Log message: /!\ physical address */ |
/* Debugging/Log message: /!\ physical address */ |
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case 0x038: |
case 0x038: |
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if (op_type == MTS_WRITE) { |
if (op_type == MTS_WRITE) { |
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len = physmem_strlen(cpu->vm,*data); |
len = physmem_strlen(vm,*data); |
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if (len < sizeof(d->buffer)) { |
if (len < sizeof(d->buffer)) { |
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physmem_copy_from_vm(cpu->vm,d->buffer,*data,len+1); |
physmem_copy_from_vm(vm,d->buffer,*data,len+1); |
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vm_log(cpu->vm,"ROM",d->buffer); |
vm_log(vm,"ROM",d->buffer); |
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} |
} |
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} |
} |
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break; |
break; |
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d->buffer[d->buf_pos] = 0; |
d->buffer[d->buf_pos] = 0; |
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if (d->buffer[d->buf_pos-1] == '\n') { |
if (d->buffer[d->buf_pos-1] == '\n') { |
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vm_log(cpu->vm,"ROM","%s",d->buffer); |
vm_log(vm,"ROM","%s",d->buffer); |
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d->buf_pos = 0; |
d->buf_pos = 0; |
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} |
} |
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} else |
} else |
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/* Console output */ |
/* Console output */ |
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case 0x040: |
case 0x040: |
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if (op_type == MTS_WRITE) |
if (op_type == MTS_WRITE) |
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vtty_put_char(cpu->vm->vtty_con,(char)*data); |
vtty_put_char(vm->vtty_con,(char)*data); |
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break; |
break; |
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/* NVRAM address */ |
/* NVRAM address */ |
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case 0x044: |
case 0x044: |
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if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
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if ((storage_dev = dev_get_by_name(cpu->vm,"nvram"))) |
if ((storage_dev = dev_get_by_name(vm,"nvram"))) |
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*data = storage_dev->phys_addr; |
*data = storage_dev->phys_addr; |
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if ((storage_dev = dev_get_by_name(cpu->vm,"ssa"))) |
if ((storage_dev = dev_get_by_name(vm,"ssa"))) |
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*data = storage_dev->phys_addr; |
*data = storage_dev->phys_addr; |
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if (cpu->type == CPU_TYPE_MIPS64) |
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*data += MIPS_KSEG1_BASE; |
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} |
} |
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break; |
break; |
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/* IO memory size for Smart-Init (C3600, others ?) */ |
/* IO memory size for Smart-Init (C3600, others ?) */ |
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case 0x048: |
case 0x048: |
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if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
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switch(cpu->vm->type) { |
switch(vm->type) { |
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case VM_TYPE_C3600: |
case VM_TYPE_C3600: |
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*data = VM_C3600(cpu->vm)->nm_iomem_size; |
*data = VM_C3600(vm)->nm_iomem_size; |
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break; |
break; |
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case VM_TYPE_C2691: |
case VM_TYPE_C2691: |
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*data = VM_C2691(cpu->vm)->nm_iomem_size; |
*data = VM_C2691(vm)->nm_iomem_size; |
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break; |
break; |
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case VM_TYPE_C3725: |
case VM_TYPE_C3725: |
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*data = VM_C3725(cpu->vm)->nm_iomem_size; |
*data = VM_C3725(vm)->nm_iomem_size; |
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break; |
break; |
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case VM_TYPE_C3745: |
case VM_TYPE_C3745: |
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*data = VM_C3745(cpu->vm)->nm_iomem_size; |
*data = VM_C3745(vm)->nm_iomem_size; |
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break; |
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case VM_TYPE_C2600: |
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*data = VM_C2600(vm)->nm_iomem_size; |
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break; |
break; |
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default: |
default: |
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*data = 0; |
*data = 0; |
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} |
} |
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} |
} |
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break; |
break; |
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/* Cookie position selector */ |
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case 0x04c: |
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if (op_type == MTS_READ) |
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*data = d->cookie_pos; |
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else |
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d->cookie_pos = *data; |
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break; |
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/* Cookie data */ |
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case 0x050: |
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if ((op_type == MTS_READ) && (d->cookie_pos < 64)) |
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*data = vm->chassis_cookie[d->cookie_pos]; |
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break; |
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} |
} |
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return NULL; |
return NULL; |