22 |
#include "cisco_eeprom.h" |
#include "cisco_eeprom.h" |
23 |
#include "dev_rom.h" |
#include "dev_rom.h" |
24 |
#include "dev_c3745.h" |
#include "dev_c3745.h" |
25 |
|
#include "dev_c3745_iofpga.h" |
26 |
#include "dev_vtty.h" |
#include "dev_vtty.h" |
27 |
#include "registry.h" |
#include "registry.h" |
28 |
|
|
369 |
registry_foreach_type(OBJ_TYPE_VM,c3745_reg_save_config,fd,NULL); |
registry_foreach_type(OBJ_TYPE_VM,c3745_reg_save_config,fd,NULL); |
370 |
} |
} |
371 |
|
|
372 |
|
/* Get slot/port corresponding to specified network IRQ */ |
373 |
|
static inline void |
374 |
|
c3745_net_irq_get_slot_port(u_int irq,u_int *slot,u_int *port) |
375 |
|
{ |
376 |
|
irq -= C3745_NETIO_IRQ_BASE; |
377 |
|
*port = irq & C3745_NETIO_IRQ_PORT_MASK; |
378 |
|
*slot = irq >> C3745_NETIO_IRQ_PORT_BITS; |
379 |
|
} |
380 |
|
|
381 |
|
/* Get network IRQ for specified slot/port */ |
382 |
|
u_int c3745_net_irq_for_slot_port(u_int slot,u_int port) |
383 |
|
{ |
384 |
|
u_int irq; |
385 |
|
|
386 |
|
irq = (slot << C3745_NETIO_IRQ_PORT_BITS) + port; |
387 |
|
irq += C3745_NETIO_IRQ_BASE; |
388 |
|
|
389 |
|
return(irq); |
390 |
|
} |
391 |
|
|
392 |
/* Set NM EEPROM definition */ |
/* Set NM EEPROM definition */ |
393 |
int c3745_nm_set_eeprom(c3745_t *router,u_int nm_bay, |
int c3745_nm_set_eeprom(c3745_t *router,u_int nm_bay, |
394 |
const struct cisco_eeprom *eeprom) |
const struct cisco_eeprom *eeprom) |
745 |
snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
746 |
|
|
747 |
/* Initialize NM driver */ |
/* Initialize NM driver */ |
748 |
if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == 1) { |
if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == -1) { |
749 |
vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
750 |
return(-1); |
return(-1); |
751 |
} |
} |
1070 |
} |
} |
1071 |
|
|
1072 |
return(dev_gt96100_init(vm,"gt96100",C3745_GT96K_ADDR,0x200000, |
return(dev_gt96100_init(vm,"gt96100",C3745_GT96K_ADDR,0x200000, |
1073 |
C3745_GT96K_IRQ,C3745_NETIO_IRQ)); |
C3745_GT96K_IRQ,c3745_net_irq_for_slot_port(0,0))); |
1074 |
} |
} |
1075 |
|
|
1076 |
/* Initialize a Cisco 3745 */ |
/* Initialize a Cisco 3745 */ |
1221 |
if (dev_c3745_iofpga_init(router,C3745_IOFPGA_ADDR,0x200000) == -1) |
if (dev_c3745_iofpga_init(router,C3745_IOFPGA_ADDR,0x200000) == -1) |
1222 |
return(-1); |
return(-1); |
1223 |
|
|
1224 |
|
if (!(obj = vm_object_find(router->vm,"io_fpga"))) |
1225 |
|
return(-1); |
1226 |
|
|
1227 |
|
router->iofpga_data = obj->data; |
1228 |
|
|
1229 |
#if 0 |
#if 0 |
1230 |
/* PCI IO space */ |
/* PCI IO space */ |
1231 |
if (!(vm->pci_io_space = pci_io_data_init(vm,C3745_PCI_IO_ADDR))) |
if (!(vm->pci_io_space = pci_io_data_init(vm,C3745_PCI_IO_ADDR))) |
1330 |
return(0); |
return(0); |
1331 |
} |
} |
1332 |
|
|
1333 |
|
/* Set an IRQ */ |
1334 |
|
static void c3745_set_irq(vm_instance_t *vm,u_int irq) |
1335 |
|
{ |
1336 |
|
c3745_t *router = VM_C3745(vm); |
1337 |
|
cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); |
1338 |
|
u_int slot,port; |
1339 |
|
|
1340 |
|
switch(irq) { |
1341 |
|
case 0 ... 7: |
1342 |
|
mips64_set_irq(cpu0,irq); |
1343 |
|
|
1344 |
|
if (cpu0->irq_idle_preempt[irq]) |
1345 |
|
cpu_idle_break_wait(cpu0->gen); |
1346 |
|
break; |
1347 |
|
|
1348 |
|
case C3745_NETIO_IRQ_BASE ... C3745_NETIO_IRQ_END: |
1349 |
|
c3745_net_irq_get_slot_port(irq,&slot,&port); |
1350 |
|
dev_c3745_iofpga_net_set_irq(router->iofpga_data,slot,port); |
1351 |
|
break; |
1352 |
|
} |
1353 |
|
} |
1354 |
|
|
1355 |
|
/* Clear an IRQ */ |
1356 |
|
static void c3745_clear_irq(vm_instance_t *vm,u_int irq) |
1357 |
|
{ |
1358 |
|
c3745_t *router = VM_C3745(vm); |
1359 |
|
cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); |
1360 |
|
u_int slot,port; |
1361 |
|
|
1362 |
|
switch(irq) { |
1363 |
|
case 0 ... 7: |
1364 |
|
mips64_clear_irq(cpu0,irq); |
1365 |
|
break; |
1366 |
|
|
1367 |
|
case C3745_NETIO_IRQ_BASE ... C3745_NETIO_IRQ_END: |
1368 |
|
c3745_net_irq_get_slot_port(irq,&slot,&port); |
1369 |
|
dev_c3745_iofpga_net_clear_irq(router->iofpga_data,slot,port); |
1370 |
|
break; |
1371 |
|
} |
1372 |
|
} |
1373 |
|
|
1374 |
/* Initialize a Cisco 3745 instance */ |
/* Initialize a Cisco 3745 instance */ |
1375 |
int c3745_init_instance(c3745_t *router) |
int c3745_init_instance(c3745_t *router) |
1376 |
{ |
{ |
1389 |
return(-1); |
return(-1); |
1390 |
} |
} |
1391 |
|
|
1392 |
|
/* IRQ routing */ |
1393 |
|
vm->set_irq = c3745_set_irq; |
1394 |
|
vm->clear_irq = c3745_clear_irq; |
1395 |
|
|
1396 |
/* Load IOS configuration file */ |
/* Load IOS configuration file */ |
1397 |
if (vm->ios_config != NULL) { |
if (vm->ios_config != NULL) { |
1398 |
vm_nvram_push_config(vm,vm->ios_config); |
vm_nvram_push_config(vm,vm->ios_config); |