1 |
/* |
/* |
2 |
* Cisco 2691 simulation platform. |
* Cisco router simulation platform. |
3 |
* Copyright (c) 2006 Christophe Fillot (cf@utc.fr) |
* Copyright (c) 2006 Christophe Fillot (cf@utc.fr) |
4 |
* |
* |
5 |
* Generic Cisco 2691 routines and definitions (EEPROM,...). |
* Generic Cisco 2691 routines and definitions (EEPROM,...). |
12 |
#include <sys/types.h> |
#include <sys/types.h> |
13 |
#include <assert.h> |
#include <assert.h> |
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|
|
15 |
#include "mips64.h" |
#include "cpu.h" |
16 |
|
#include "vm.h" |
17 |
#include "dynamips.h" |
#include "dynamips.h" |
18 |
#include "memory.h" |
#include "memory.h" |
19 |
#include "device.h" |
#include "device.h" |
20 |
#include "pci_io.h" |
#include "pci_io.h" |
21 |
#include "dev_gt.h" |
#include "dev_gt.h" |
22 |
#include "cisco_eeprom.h" |
#include "cisco_eeprom.h" |
23 |
|
#include "dev_rom.h" |
24 |
#include "dev_c2691.h" |
#include "dev_c2691.h" |
25 |
|
#include "dev_c2691_iofpga.h" |
26 |
#include "dev_vtty.h" |
#include "dev_vtty.h" |
27 |
#include "registry.h" |
#include "registry.h" |
28 |
|
|
331 |
registry_foreach_type(OBJ_TYPE_VM,c2691_reg_save_config,fd,NULL); |
registry_foreach_type(OBJ_TYPE_VM,c2691_reg_save_config,fd,NULL); |
332 |
} |
} |
333 |
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|
334 |
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/* Get slot/port corresponding to specified network IRQ */ |
335 |
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static inline void |
336 |
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c2691_net_irq_get_slot_port(u_int irq,u_int *slot,u_int *port) |
337 |
|
{ |
338 |
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irq -= C2691_NETIO_IRQ_BASE; |
339 |
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*port = irq & C2691_NETIO_IRQ_PORT_MASK; |
340 |
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*slot = irq >> C2691_NETIO_IRQ_PORT_BITS; |
341 |
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} |
342 |
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|
343 |
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/* Get network IRQ for specified slot/port */ |
344 |
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u_int c2691_net_irq_for_slot_port(u_int slot,u_int port) |
345 |
|
{ |
346 |
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u_int irq; |
347 |
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|
348 |
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irq = (slot << C2691_NETIO_IRQ_PORT_BITS) + port; |
349 |
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irq += C2691_NETIO_IRQ_BASE; |
350 |
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|
351 |
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return(irq); |
352 |
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} |
353 |
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|
354 |
/* Set NM EEPROM definition */ |
/* Set NM EEPROM definition */ |
355 |
int c2691_nm_set_eeprom(c2691_t *router,u_int nm_bay, |
int c2691_nm_set_eeprom(c2691_t *router,u_int nm_bay, |
356 |
const struct cisco_eeprom *eeprom) |
const struct cisco_eeprom *eeprom) |
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snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
708 |
|
|
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/* Initialize NM driver */ |
/* Initialize NM driver */ |
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if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == 1) { |
if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == -1) { |
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vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
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return(-1); |
return(-1); |
713 |
} |
} |
1030 |
} |
} |
1031 |
|
|
1032 |
return(dev_gt96100_init(vm,"gt96100",C2691_GT96K_ADDR,0x200000, |
return(dev_gt96100_init(vm,"gt96100",C2691_GT96K_ADDR,0x200000, |
1033 |
C2691_GT96K_IRQ,C2691_NETIO_IRQ)); |
C2691_GT96K_IRQ,c2691_net_irq_for_slot_port(0,0))); |
1034 |
} |
} |
1035 |
|
|
1036 |
/* Initialize a Cisco 2691 */ |
/* Initialize a Cisco 2691 */ |
1039 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1040 |
|
|
1041 |
/* Set the processor type: R7000 */ |
/* Set the processor type: R7000 */ |
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mips64_set_prid(vm->boot_cpu,MIPS_PRID_R7000); |
mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R7000); |
1043 |
|
|
1044 |
/* Initialize the Galileo GT-96100 PCI controller */ |
/* Initialize the Galileo GT-96100 PCI controller */ |
1045 |
if (c2691_init_gt96100(router) == -1) |
if (c2691_init_gt96100(router) == -1) |
1114 |
/* Initialize the C2691 Platform */ |
/* Initialize the C2691 Platform */ |
1115 |
int c2691_init_platform(c2691_t *router) |
int c2691_init_platform(c2691_t *router) |
1116 |
{ |
{ |
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extern m_uint8_t microcode[]; |
|
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extern ssize_t microcode_len; |
|
1117 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1118 |
struct c2691_nm_bay *nm_bay; |
struct c2691_nm_bay *nm_bay; |
1119 |
cpu_mips_t *cpu; |
cpu_mips_t *cpu; |
1120 |
|
cpu_gen_t *gen; |
1121 |
vm_obj_t *obj; |
vm_obj_t *obj; |
1122 |
int i; |
int i; |
1123 |
|
|
1131 |
vm->cpu_group = cpu_group_create("System CPU"); |
vm->cpu_group = cpu_group_create("System CPU"); |
1132 |
|
|
1133 |
/* Initialize the virtual MIPS processor */ |
/* Initialize the virtual MIPS processor */ |
1134 |
if (!(cpu = cpu_create(vm,0))) { |
if (!(gen = cpu_create(vm,CPU_TYPE_MIPS64,0))) { |
1135 |
vm_error(vm,"unable to create CPU!\n"); |
vm_error(vm,"unable to create CPU!\n"); |
1136 |
return(-1); |
return(-1); |
1137 |
} |
} |
1138 |
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|
1139 |
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cpu = CPU_MIPS64(gen); |
1140 |
|
|
1141 |
/* Add this CPU to the system CPU group */ |
/* Add this CPU to the system CPU group */ |
1142 |
cpu_group_add(vm->cpu_group,cpu); |
cpu_group_add(vm->cpu_group,gen); |
1143 |
vm->boot_cpu = cpu; |
vm->boot_cpu = gen; |
1144 |
|
|
1145 |
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/* Initialize the IRQ routing vectors */ |
1146 |
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vm->set_irq = mips64_vm_set_irq; |
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vm->clear_irq = mips64_vm_clear_irq; |
1148 |
|
|
1149 |
/* Mark the Network IO interrupt as high priority */ |
/* Mark the Network IO interrupt as high priority */ |
1150 |
cpu->irq_idle_preempt[C2691_NETIO_IRQ] = TRUE; |
cpu->irq_idle_preempt[C2691_NETIO_IRQ] = TRUE; |
1161 |
dev_remote_control_init(vm,0x16000000,0x1000); |
dev_remote_control_init(vm,0x16000000,0x1000); |
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|
|
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/* Specific Storage Area (SSA) */ |
/* Specific Storage Area (SSA) */ |
1164 |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,0x16001000ULL,0x7000); |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,FALSE,0x16001000ULL,0x7000); |
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|
|
1166 |
/* IO FPGA */ |
/* IO FPGA */ |
1167 |
if (dev_c2691_iofpga_init(router,C2691_IOFPGA_ADDR,0x40000) == -1) |
if (dev_c2691_iofpga_init(router,C2691_IOFPGA_ADDR,0x40000) == -1) |
1168 |
return(-1); |
return(-1); |
1169 |
|
|
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if (!(obj = vm_object_find(router->vm,"io_fpga"))) |
1171 |
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return(-1); |
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|
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router->iofpga_data = obj->data; |
1174 |
|
|
1175 |
#if 0 |
#if 0 |
1176 |
/* PCI IO space */ |
/* PCI IO space */ |
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if (!(vm->pci_io_space = pci_io_data_init(vm,C2691_PCI_IO_ADDR))) |
if (!(vm->pci_io_space = pci_io_data_init(vm,C2691_PCI_IO_ADDR))) |
1189 |
if (!(obj = dev_flash_init(vm,"rom",C2691_ROM_ADDR,vm->rom_size*1048576))) |
if (!(obj = dev_flash_init(vm,"rom",C2691_ROM_ADDR,vm->rom_size*1048576))) |
1190 |
return(-1); |
return(-1); |
1191 |
|
|
1192 |
dev_flash_copy_data(obj,0,microcode,microcode_len); |
dev_flash_copy_data(obj,0,mips64_microcode,mips64_microcode_len); |
1193 |
c2691_nvram_check_empty_config(vm); |
c2691_nvram_check_empty_config(vm); |
1194 |
|
|
1195 |
/* Initialize the NS16552 DUART */ |
/* Initialize the NS16552 DUART */ |
1230 |
int c2691_boot_ios(c2691_t *router) |
int c2691_boot_ios(c2691_t *router) |
1231 |
{ |
{ |
1232 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
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|
cpu_mips_t *cpu; |
1234 |
|
|
1235 |
if (!vm->boot_cpu) |
if (!vm->boot_cpu) |
1236 |
return(-1); |
return(-1); |
1245 |
} |
} |
1246 |
|
|
1247 |
/* Reset the boot CPU */ |
/* Reset the boot CPU */ |
1248 |
mips64_reset(vm->boot_cpu); |
cpu = CPU_MIPS64(vm->boot_cpu); |
1249 |
|
mips64_reset(cpu); |
1250 |
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|
1251 |
/* Load IOS image */ |
/* Load IOS image */ |
1252 |
if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image, |
if (mips64_load_elf_image(cpu,vm->ios_image, |
1253 |
(vm->ghost_status == VM_GHOST_RAM_USE), |
(vm->ghost_status == VM_GHOST_RAM_USE), |
1254 |
&vm->ios_entry_point) < 0) |
&vm->ios_entry_point) < 0) |
1255 |
{ |
{ |
1260 |
/* Launch the simulation */ |
/* Launch the simulation */ |
1261 |
printf("\nC2691 '%s': starting simulation (CPU0 PC=0x%llx), " |
printf("\nC2691 '%s': starting simulation (CPU0 PC=0x%llx), " |
1262 |
"JIT %sabled.\n", |
"JIT %sabled.\n", |
1263 |
vm->name,vm->boot_cpu->pc,vm->jit_use ? "en":"dis"); |
vm->name,cpu->pc,vm->jit_use ? "en":"dis"); |
1264 |
|
|
1265 |
vm_log(vm,"C2691_BOOT", |
vm_log(vm,"C2691_BOOT", |
1266 |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
1267 |
vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off"); |
cpu->pc,cpu->idle_pc,vm->jit_use ? "on":"off"); |
1268 |
|
|
1269 |
/* Start main CPU */ |
/* Start main CPU */ |
1270 |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
1276 |
return(0); |
return(0); |
1277 |
} |
} |
1278 |
|
|
1279 |
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/* Set an IRQ */ |
1280 |
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static void c2691_set_irq(vm_instance_t *vm,u_int irq) |
1281 |
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{ |
1282 |
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c2691_t *router = VM_C2691(vm); |
1283 |
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cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); |
1284 |
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u_int slot,port; |
1285 |
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|
1286 |
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switch(irq) { |
1287 |
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case 0 ... 7: |
1288 |
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mips64_set_irq(cpu0,irq); |
1289 |
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|
1290 |
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if (cpu0->irq_idle_preempt[irq]) |
1291 |
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cpu_idle_break_wait(cpu0->gen); |
1292 |
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break; |
1293 |
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|
1294 |
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case C2691_NETIO_IRQ_BASE ... C2691_NETIO_IRQ_END: |
1295 |
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c2691_net_irq_get_slot_port(irq,&slot,&port); |
1296 |
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dev_c2691_iofpga_net_set_irq(router->iofpga_data,slot,port); |
1297 |
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break; |
1298 |
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} |
1299 |
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} |
1300 |
|
|
1301 |
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/* Clear an IRQ */ |
1302 |
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static void c2691_clear_irq(vm_instance_t *vm,u_int irq) |
1303 |
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{ |
1304 |
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c2691_t *router = VM_C2691(vm); |
1305 |
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cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); |
1306 |
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u_int slot,port; |
1307 |
|
|
1308 |
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switch(irq) { |
1309 |
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case 0 ... 7: |
1310 |
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mips64_clear_irq(cpu0,irq); |
1311 |
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break; |
1312 |
|
|
1313 |
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case C2691_NETIO_IRQ_BASE ... C2691_NETIO_IRQ_END: |
1314 |
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c2691_net_irq_get_slot_port(irq,&slot,&port); |
1315 |
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dev_c2691_iofpga_net_clear_irq(router->iofpga_data,slot,port); |
1316 |
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break; |
1317 |
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} |
1318 |
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} |
1319 |
|
|
1320 |
/* Initialize a Cisco 2691 instance */ |
/* Initialize a Cisco 2691 instance */ |
1321 |
int c2691_init_instance(c2691_t *router) |
int c2691_init_instance(c2691_t *router) |
1322 |
{ |
{ |
1335 |
return(-1); |
return(-1); |
1336 |
} |
} |
1337 |
|
|
1338 |
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/* IRQ routing */ |
1339 |
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vm->set_irq = c2691_set_irq; |
1340 |
|
vm->clear_irq = c2691_clear_irq; |
1341 |
|
|
1342 |
/* Load IOS configuration file */ |
/* Load IOS configuration file */ |
1343 |
if (vm->ios_config != NULL) { |
if (vm->ios_config != NULL) { |
1344 |
vm_nvram_push_config(vm,vm->ios_config); |
vm_nvram_push_config(vm,vm->ios_config); |
1346 |
} |
} |
1347 |
|
|
1348 |
/* Load ROM (ELF image or embedded) */ |
/* Load ROM (ELF image or embedded) */ |
1349 |
cpu0 = vm->boot_cpu; |
cpu0 = CPU_MIPS64(vm->boot_cpu); |
1350 |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
1351 |
|
|
1352 |
if ((vm->rom_filename != NULL) && |
if ((vm->rom_filename != NULL) && |