23 |
#include "dev_mpc860.h" |
#include "dev_mpc860.h" |
24 |
#include "dev_rom.h" |
#include "dev_rom.h" |
25 |
#include "dev_c2600.h" |
#include "dev_c2600.h" |
26 |
|
#include "dev_c2600_iofpga.h" |
27 |
#include "dev_vtty.h" |
#include "dev_vtty.h" |
28 |
#include "registry.h" |
#include "registry.h" |
29 |
|
|
77 |
&dev_c2600_nm_4e_driver, |
&dev_c2600_nm_4e_driver, |
78 |
&dev_c2600_nm_1fe_tx_driver, |
&dev_c2600_nm_1fe_tx_driver, |
79 |
&dev_c2600_nm_16esw_driver, |
&dev_c2600_nm_16esw_driver, |
80 |
|
|
81 |
NULL, |
NULL, |
82 |
}; |
}; |
83 |
|
|
439 |
registry_foreach_type(OBJ_TYPE_VM,c2600_reg_save_config,fd,NULL); |
registry_foreach_type(OBJ_TYPE_VM,c2600_reg_save_config,fd,NULL); |
440 |
} |
} |
441 |
|
|
442 |
|
/* Get slot/port corresponding to specified network IRQ */ |
443 |
|
static inline void |
444 |
|
c2600_net_irq_get_slot_port(u_int irq,u_int *slot,u_int *port) |
445 |
|
{ |
446 |
|
irq -= C2600_NETIO_IRQ_BASE; |
447 |
|
*port = irq & C2600_NETIO_IRQ_PORT_MASK; |
448 |
|
*slot = irq >> C2600_NETIO_IRQ_PORT_BITS; |
449 |
|
} |
450 |
|
|
451 |
|
/* Get network IRQ for specified slot/port */ |
452 |
|
u_int c2600_net_irq_for_slot_port(u_int slot,u_int port) |
453 |
|
{ |
454 |
|
u_int irq; |
455 |
|
|
456 |
|
irq = (slot << C2600_NETIO_IRQ_PORT_BITS) + port; |
457 |
|
irq += C2600_NETIO_IRQ_BASE; |
458 |
|
|
459 |
|
return(irq); |
460 |
|
} |
461 |
|
|
462 |
/* Find Cisco 2600 Mainboard info */ |
/* Find Cisco 2600 Mainboard info */ |
463 |
static struct c2600_mb_id *c2600_get_mb_info(char *mainboard_type) |
static struct c2600_mb_id *c2600_get_mb_info(char *mainboard_type) |
464 |
{ |
{ |
848 |
snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); |
849 |
|
|
850 |
/* Initialize NM driver */ |
/* Initialize NM driver */ |
851 |
if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == 1) { |
if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == -1) { |
852 |
vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); |
853 |
return(-1); |
return(-1); |
854 |
} |
} |
1256 |
{ |
{ |
1257 |
c2600_t *router = VM_C2600(vm); |
c2600_t *router = VM_C2600(vm); |
1258 |
cpu_ppc_t *cpu = CPU_PPC32(vm->boot_cpu); |
cpu_ppc_t *cpu = CPU_PPC32(vm->boot_cpu); |
1259 |
|
u_int slot,port; |
1260 |
|
|
1261 |
switch(irq) { |
switch(irq) { |
1262 |
case C2600_VTIMER_IRQ: |
case C2600_VTIMER_IRQ: |
1263 |
mpc860_set_pending_irq(router->mpc_data,30); |
mpc860_set_pending_irq(router->mpc_data,30); |
1272 |
mpc860_set_pending_irq(router->mpc_data,27); |
mpc860_set_pending_irq(router->mpc_data,27); |
1273 |
break; |
break; |
1274 |
|
|
1275 |
|
case C2600_NETIO_IRQ_BASE ... C2600_NETIO_IRQ_END: |
1276 |
|
c2600_net_irq_get_slot_port(irq,&slot,&port); |
1277 |
|
dev_c2600_iofpga_net_set_irq(router->iofpga_data,slot,port); |
1278 |
|
break; |
1279 |
|
|
1280 |
/* IRQ test */ |
/* IRQ test */ |
1281 |
case 255: |
case 255: |
1282 |
mpc860_set_pending_irq(router->mpc_data,24); |
mpc860_set_pending_irq(router->mpc_data,24); |
1283 |
break; |
break; |
1284 |
} |
} |
1285 |
|
|
1286 |
if (cpu->irq_idle_preempt[irq]) |
if (vm->irq_idle_preempt[irq]) |
1287 |
cpu_idle_break_wait(cpu->gen); |
cpu_idle_break_wait(cpu->gen); |
1288 |
} |
} |
1289 |
|
|
1291 |
static void c2600_clear_irq(vm_instance_t *vm,u_int irq) |
static void c2600_clear_irq(vm_instance_t *vm,u_int irq) |
1292 |
{ |
{ |
1293 |
c2600_t *router = VM_C2600(vm); |
c2600_t *router = VM_C2600(vm); |
1294 |
|
u_int slot,port; |
1295 |
|
|
1296 |
switch(irq) { |
switch(irq) { |
1297 |
case C2600_VTIMER_IRQ: |
case C2600_VTIMER_IRQ: |
1307 |
mpc860_clear_pending_irq(router->mpc_data,27); |
mpc860_clear_pending_irq(router->mpc_data,27); |
1308 |
break; |
break; |
1309 |
|
|
1310 |
|
case C2600_NETIO_IRQ_BASE ... C2600_NETIO_IRQ_END: |
1311 |
|
c2600_net_irq_get_slot_port(irq,&slot,&port); |
1312 |
|
dev_c2600_iofpga_net_clear_irq(router->iofpga_data,slot,port); |
1313 |
|
break; |
1314 |
|
|
1315 |
/* IRQ test */ |
/* IRQ test */ |
1316 |
case 255: |
case 255: |
1317 |
mpc860_clear_pending_irq(router->mpc_data,24); |
mpc860_clear_pending_irq(router->mpc_data,24); |
1353 |
|
|
1354 |
/* Set processor ID */ |
/* Set processor ID */ |
1355 |
ppc32_set_pvr(cpu,0x00500202); |
ppc32_set_pvr(cpu,0x00500202); |
1356 |
|
|
1357 |
/* Mark the Network IO interrupt as high priority */ |
/* Mark the Network IO interrupt as high priority */ |
1358 |
cpu->irq_idle_preempt[C2600_NETIO_IRQ] = TRUE; |
vm->irq_idle_preempt[C2600_NETIO_IRQ] = TRUE; |
1359 |
cpu->irq_idle_preempt[C2600_DUART_IRQ] = TRUE; |
vm->irq_idle_preempt[C2600_DUART_IRQ] = TRUE; |
1360 |
|
|
1361 |
/* Copy some parameters from VM to CPU (idle PC, ...) */ |
/* Copy some parameters from VM to CPU (idle PC, ...) */ |
1362 |
cpu->idle_pc = vm->idle_pc; |
cpu->idle_pc = vm->idle_pc; |
1380 |
if (dev_c2600_iofpga_init(router,C2600_IOFPGA_ADDR,0x10000) == -1) |
if (dev_c2600_iofpga_init(router,C2600_IOFPGA_ADDR,0x10000) == -1) |
1381 |
return(-1); |
return(-1); |
1382 |
|
|
1383 |
|
if (!(obj = vm_object_find(router->vm,"io_fpga"))) |
1384 |
|
return(-1); |
1385 |
|
|
1386 |
|
router->iofpga_data = obj->data; |
1387 |
|
|
1388 |
/* Initialize the chassis */ |
/* Initialize the chassis */ |
1389 |
if (c2600_init(router) == -1) |
if (c2600_init(router) == -1) |
1390 |
return(-1); |
return(-1); |
1445 |
{ PPC32_IBAT_IDX, 0, 0xfff0001e, 0xfff00001 }, |
{ PPC32_IBAT_IDX, 0, 0xfff0001e, 0xfff00001 }, |
1446 |
{ PPC32_IBAT_IDX, 1, 0x00001ffe, 0x00000001 }, |
{ PPC32_IBAT_IDX, 1, 0x00001ffe, 0x00000001 }, |
1447 |
{ PPC32_IBAT_IDX, 2, 0x00000000, 0xee3e0072 }, |
{ PPC32_IBAT_IDX, 2, 0x00000000, 0xee3e0072 }, |
1448 |
{ PPC32_IBAT_IDX, 3, 0x80001ffe, 0x80000001 }, |
{ PPC32_IBAT_IDX, 3, 0x80001ffe, 0x00000001 }, |
1449 |
|
|
1450 |
{ PPC32_DBAT_IDX, 0, 0x80001ffe, 0x80000042 }, |
{ PPC32_DBAT_IDX, 0, 0x80001ffe, 0x00000042 }, |
1451 |
{ PPC32_DBAT_IDX, 1, 0x00001ffe, 0x0000002a }, |
{ PPC32_DBAT_IDX, 1, 0x00001ffe, 0x0000002a }, |
1452 |
{ PPC32_DBAT_IDX, 2, 0x40007ffe, 0x4000002a }, |
{ PPC32_DBAT_IDX, 2, 0x40007ffe, 0x4000002a }, |
1453 |
{ PPC32_DBAT_IDX, 3, 0xfc0007fe, 0xfc00002a }, |
{ PPC32_DBAT_IDX, 3, 0xf0001ffe, 0xf000002a }, |
1454 |
{ -1, -1, 0, 0 }, |
{ -1, -1, 0, 0 }, |
1455 |
}; |
}; |
1456 |
|
|
1481 |
|
|
1482 |
/* Load BAT registers */ |
/* Load BAT registers */ |
1483 |
printf("Loading BAT registers\n"); |
printf("Loading BAT registers\n"); |
1484 |
ppc32_load_bat_array(CPU_PPC32(vm->boot_cpu),bat_array); |
ppc32_load_bat_array(cpu,bat_array); |
1485 |
|
cpu->msr |= PPC32_MSR_IR|PPC32_MSR_DR; |
1486 |
|
|
1487 |
/* IRQ routing */ |
/* IRQ routing */ |
1488 |
vm->set_irq = c2600_set_irq; |
vm->set_irq = c2600_set_irq; |