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/* |
/* |
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* Cisco C7200 (Predator) Simulation Platform. |
* Cisco router simulation platform. |
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* Copyright (C) 2005,2006 Christophe Fillot. All rights reserved. |
* Copyright (C) 2005,2006 Christophe Fillot. All rights reserved. |
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* |
* |
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* PLX PCI9060/PCI9054 - PCI bus master interface chip. |
* PLX PCI9060/PCI9054 - PCI bus master interface chip. |
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#include <stdlib.h> |
#include <stdlib.h> |
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#include <string.h> |
#include <string.h> |
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#include "mips64.h" |
#include "cpu.h" |
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#include "vm.h" |
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#include "dynamips.h" |
#include "dynamips.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "device.h" |
#include "device.h" |
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} |
} |
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/* PLX device common access routine */ |
/* PLX device common access routine */ |
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void *dev_plx_access(cpu_mips_t *cpu,struct vdevice *dev, |
void *dev_plx_access(cpu_gen_t *cpu,struct vdevice *dev, |
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m_uint32_t offset,u_int op_size,u_int op_type, |
m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
m_uint64_t *data) |
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{ |
{ |
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if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
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cpu_log(cpu,d->name, |
cpu_log(cpu,d->name, |
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"read from unhandled addr 0x%x, pc=0x%llx (size=%u)\n", |
"read from unhandled addr 0x%x, pc=0x%llx (size=%u)\n", |
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offset,cpu->pc,op_size); |
offset,cpu_get_pc(cpu),op_size); |
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} else { |
} else { |
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cpu_log(cpu,d->name, |
cpu_log(cpu,d->name, |
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"write to handled addr 0x%x, value=0x%llx, " |
"write to handled addr 0x%x, value=0x%llx, " |
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"pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); |
"pc=0x%llx (size=%u)\n", |
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offset,*data,cpu_get_pc(cpu),op_size); |
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} |
} |
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} |
} |
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} |
} |
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/* PLX9054 access routine */ |
/* PLX9054 access routine */ |
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void *dev_plx9054_access(cpu_mips_t *cpu,struct vdevice *dev, |
void *dev_plx9054_access(cpu_gen_t *cpu,struct vdevice *dev, |
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m_uint32_t offset,u_int op_size,u_int op_type, |
m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
m_uint64_t *data) |
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{ |
{ |
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/* |
/* |
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* pci_plx_read() - Common PCI read. |
* pci_plx_read() - Common PCI read. |
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*/ |
*/ |
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static m_uint32_t pci_plx_read(cpu_mips_t *cpu,struct pci_device *dev,int reg) |
static m_uint32_t pci_plx_read(cpu_gen_t *cpu,struct pci_device *dev,int reg) |
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{ |
{ |
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struct plx_data *d = dev->priv_data; |
struct plx_data *d = dev->priv_data; |
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|
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/* |
/* |
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* pci_plx_write() - Common PCI write. |
* pci_plx_write() - Common PCI write. |
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*/ |
*/ |
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static void pci_plx_write(cpu_mips_t *cpu,struct pci_device *dev, |
static void pci_plx_write(cpu_gen_t *cpu,struct pci_device *dev, |
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int reg,m_uint32_t value) |
int reg,m_uint32_t value) |
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{ |
{ |
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struct plx_data *d = dev->priv_data; |
struct plx_data *d = dev->priv_data; |
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/* |
/* |
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* pci_plx9054_read() |
* pci_plx9054_read() |
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*/ |
*/ |
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static m_uint32_t pci_plx9054_read(cpu_mips_t *cpu,struct pci_device *dev, |
static m_uint32_t pci_plx9054_read(cpu_gen_t *cpu,struct pci_device *dev, |
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int reg) |
int reg) |
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{ |
{ |
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struct plx_data *d = dev->priv_data; |
struct plx_data *d = dev->priv_data; |
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/* |
/* |
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* pci_plx9054_write() |
* pci_plx9054_write() |
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*/ |
*/ |
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static void pci_plx9054_write(cpu_mips_t *cpu,struct pci_device *dev, |
static void pci_plx9054_write(cpu_gen_t *cpu,struct pci_device *dev, |
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int reg,m_uint32_t value) |
int reg,m_uint32_t value) |
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{ |
{ |
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struct plx_data *d = dev->priv_data; |
struct plx_data *d = dev->priv_data; |