1395 |
switch(cmd) { |
switch(cmd) { |
1396 |
case BCM5600_SCHAN_CMD_EXEC: |
case BCM5600_SCHAN_CMD_EXEC: |
1397 |
bcm5600_handle_gen_cmd(d); |
bcm5600_handle_gen_cmd(d); |
1398 |
d->schan_cmd_res = 0xFFFFFFFF; |
d->schan_cmd_res = 0x00008002; |
1399 |
break; |
break; |
1400 |
|
|
1401 |
case BCM5600_SCHAN_CMD_READ_MII: |
case BCM5600_SCHAN_CMD_READ_MII: |
1402 |
bcm5600_mii_read(d); |
bcm5600_mii_read(d); |
1403 |
d->schan_cmd_res = 0xFFFFFFFF; |
d->schan_cmd_res = 0x00048000; |
1404 |
break; |
break; |
1405 |
|
|
1406 |
case BCM5600_SCHAN_CMD_WRITE_MII: |
case BCM5600_SCHAN_CMD_WRITE_MII: |
1407 |
bcm5600_mii_write(d); |
bcm5600_mii_write(d); |
1408 |
d->schan_cmd_res = 0xFFFFFFFF; |
d->schan_cmd_res = 0x00048000; |
1409 |
break; |
break; |
1410 |
|
|
1411 |
case BCM5600_SCHAN_CMD_LINKSCAN: |
case BCM5600_SCHAN_CMD_LINKSCAN: |
1423 |
/* |
/* |
1424 |
* dev_bcm5605_access() |
* dev_bcm5605_access() |
1425 |
*/ |
*/ |
1426 |
void *dev_bcm5605_access(cpu_mips_t *cpu,struct vdevice *dev,m_uint32_t offset, |
void *dev_bcm5605_access(cpu_gen_t *cpu,struct vdevice *dev,m_uint32_t offset, |
1427 |
u_int op_size,u_int op_type,m_uint64_t *data) |
u_int op_size,u_int op_type,m_uint64_t *data) |
1428 |
{ |
{ |
1429 |
struct nm_16esw_data *d = dev->priv_data; |
struct nm_16esw_data *d = dev->priv_data; |
1434 |
|
|
1435 |
#if DEBUG_ACCESS |
#if DEBUG_ACCESS |
1436 |
if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
1437 |
BCM_LOG(d,"read access to offset=0x%x, pc=0x%llx\n",offset,cpu->pc); |
BCM_LOG(d,"read access to offset=0x%x, pc=0x%llx\n", |
1438 |
|
offset,cpu_get_pc(cpu)); |
1439 |
} else { |
} else { |
1440 |
BCM_LOG(d,"write access to offset=0x%x, pc=0x%llx, val=0x%llx\n", |
BCM_LOG(d,"write access to offset=0x%x, pc=0x%llx, val=0x%llx\n", |
1441 |
offset,cpu->pc,*data); |
offset,cpu_get_pc(cpu),*data); |
1442 |
} |
} |
1443 |
#endif |
#endif |
1444 |
|
|
1546 |
default: |
default: |
1547 |
if (op_type == MTS_READ) { |
if (op_type == MTS_READ) { |
1548 |
BCM_LOG(d,"read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", |
BCM_LOG(d,"read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", |
1549 |
offset,cpu->pc,op_size); |
offset,cpu_get_pc(cpu),op_size); |
1550 |
} else { |
} else { |
1551 |
BCM_LOG(d,"write to unknown addr 0x%x, value=0x%llx, " |
BCM_LOG(d,"write to unknown addr 0x%x, value=0x%llx, " |
1552 |
"pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); |
"pc=0x%llx (size=%u)\n", |
1553 |
|
offset,*data,cpu_get_pc(cpu),op_size); |
1554 |
} |
} |
1555 |
#endif |
#endif |
1556 |
} |
} |
2127 |
discard = port_entry[0] & BCM5600_PTABLE_PRT_DIS_MASK; |
discard = port_entry[0] & BCM5600_PTABLE_PRT_DIS_MASK; |
2128 |
discard >>= BCM5600_PTABLE_PRT_DIS_SHIFT; |
discard >>= BCM5600_PTABLE_PRT_DIS_SHIFT; |
2129 |
|
|
2130 |
if (discard) { |
if ((p->orig_vlan == -1) && discard) { |
2131 |
if (discard != 0x20) { |
if (discard != 0x20) { |
2132 |
printf("\n\n\n" |
printf("\n\n\n" |
2133 |
"-----------------------------------------------------------" |
"-----------------------------------------------------------" |
2363 |
} |
} |
2364 |
|
|
2365 |
/* pci_bcm5605_read() */ |
/* pci_bcm5605_read() */ |
2366 |
static m_uint32_t pci_bcm5605_read(cpu_mips_t *cpu,struct pci_device *dev, |
static m_uint32_t pci_bcm5605_read(cpu_gen_t *cpu,struct pci_device *dev, |
2367 |
int reg) |
int reg) |
2368 |
{ |
{ |
2369 |
struct nm_16esw_data *d = dev->priv_data; |
struct nm_16esw_data *d = dev->priv_data; |
2377 |
} |
} |
2378 |
|
|
2379 |
/* pci_bcm5605_write() */ |
/* pci_bcm5605_write() */ |
2380 |
static void pci_bcm5605_write(cpu_mips_t *cpu,struct pci_device *dev, |
static void pci_bcm5605_write(cpu_gen_t *cpu,struct pci_device *dev, |
2381 |
int reg,m_uint32_t value) |
int reg,m_uint32_t value) |
2382 |
{ |
{ |
2383 |
struct nm_16esw_data *d = dev->priv_data; |
struct nm_16esw_data *d = dev->priv_data; |