12 |
#include <sys/types.h> |
#include <sys/types.h> |
13 |
#include <assert.h> |
#include <assert.h> |
14 |
|
|
15 |
#include "mips64.h" |
#include "cpu.h" |
16 |
|
#include "vm.h" |
17 |
#include "dynamips.h" |
#include "dynamips.h" |
18 |
#include "memory.h" |
#include "memory.h" |
19 |
#include "device.h" |
#include "device.h" |
20 |
#include "pci_io.h" |
#include "pci_io.h" |
21 |
#include "dev_gt.h" |
#include "dev_gt.h" |
22 |
#include "cisco_eeprom.h" |
#include "cisco_eeprom.h" |
23 |
|
#include "dev_rom.h" |
24 |
#include "dev_c3725.h" |
#include "dev_c3725.h" |
25 |
#include "dev_vtty.h" |
#include "dev_vtty.h" |
26 |
#include "registry.h" |
#include "registry.h" |
1031 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1032 |
|
|
1033 |
/* Set the processor type: R7000 */ |
/* Set the processor type: R7000 */ |
1034 |
mips64_set_prid(vm->boot_cpu,MIPS_PRID_R7000); |
mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R7000); |
1035 |
|
|
1036 |
/* Initialize the Galileo GT-96100 PCI controller */ |
/* Initialize the Galileo GT-96100 PCI controller */ |
1037 |
if (c3725_init_gt96100(router) == -1) |
if (c3725_init_gt96100(router) == -1) |
1107 |
/* Initialize the C3725 Platform */ |
/* Initialize the C3725 Platform */ |
1108 |
int c3725_init_platform(c3725_t *router) |
int c3725_init_platform(c3725_t *router) |
1109 |
{ |
{ |
|
extern m_uint8_t microcode[]; |
|
|
extern ssize_t microcode_len; |
|
1110 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1111 |
struct c3725_nm_bay *nm_bay; |
struct c3725_nm_bay *nm_bay; |
1112 |
cpu_mips_t *cpu; |
cpu_mips_t *cpu; |
1113 |
|
cpu_gen_t *gen; |
1114 |
vm_obj_t *obj; |
vm_obj_t *obj; |
1115 |
int i; |
int i; |
1116 |
|
|
1124 |
vm->cpu_group = cpu_group_create("System CPU"); |
vm->cpu_group = cpu_group_create("System CPU"); |
1125 |
|
|
1126 |
/* Initialize the virtual MIPS processor */ |
/* Initialize the virtual MIPS processor */ |
1127 |
if (!(cpu = cpu_create(vm,0))) { |
if (!(gen = cpu_create(vm,CPU_TYPE_MIPS64,0))) { |
1128 |
vm_error(vm,"unable to create CPU!\n"); |
vm_error(vm,"unable to create CPU!\n"); |
1129 |
return(-1); |
return(-1); |
1130 |
} |
} |
1131 |
|
|
1132 |
|
cpu = CPU_MIPS64(gen); |
1133 |
|
|
1134 |
/* Add this CPU to the system CPU group */ |
/* Add this CPU to the system CPU group */ |
1135 |
cpu_group_add(vm->cpu_group,cpu); |
cpu_group_add(vm->cpu_group,gen); |
1136 |
vm->boot_cpu = cpu; |
vm->boot_cpu = gen; |
1137 |
|
|
1138 |
|
/* Initialize the IRQ routing vectors */ |
1139 |
|
vm->set_irq = mips64_vm_set_irq; |
1140 |
|
vm->clear_irq = mips64_vm_clear_irq; |
1141 |
|
|
1142 |
/* Mark the Network IO interrupt as high priority */ |
/* Mark the Network IO interrupt as high priority */ |
1143 |
cpu->irq_idle_preempt[C3725_NETIO_IRQ] = TRUE; |
cpu->irq_idle_preempt[C3725_NETIO_IRQ] = TRUE; |
1154 |
dev_remote_control_init(vm,0x16000000,0x1000); |
dev_remote_control_init(vm,0x16000000,0x1000); |
1155 |
|
|
1156 |
/* Specific Storage Area (SSA) */ |
/* Specific Storage Area (SSA) */ |
1157 |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,0x16001000ULL,0x7000); |
dev_ram_init(vm,"ssa",TRUE,FALSE,NULL,FALSE,0x16001000ULL,0x7000); |
1158 |
|
|
1159 |
/* IO FPGA */ |
/* IO FPGA */ |
1160 |
if (dev_c3725_iofpga_init(router,C3725_IOFPGA_ADDR,0x40000) == -1) |
if (dev_c3725_iofpga_init(router,C3725_IOFPGA_ADDR,0x40000) == -1) |
1177 |
if (!(obj = dev_flash_init(vm,"rom",C3725_ROM_ADDR,vm->rom_size*1048576))) |
if (!(obj = dev_flash_init(vm,"rom",C3725_ROM_ADDR,vm->rom_size*1048576))) |
1178 |
return(-1); |
return(-1); |
1179 |
|
|
1180 |
dev_flash_copy_data(obj,0,microcode,microcode_len); |
dev_flash_copy_data(obj,0,mips64_microcode,mips64_microcode_len); |
1181 |
c3725_nvram_check_empty_config(vm); |
c3725_nvram_check_empty_config(vm); |
1182 |
|
|
1183 |
/* Initialize the NS16552 DUART */ |
/* Initialize the NS16552 DUART */ |
1218 |
int c3725_boot_ios(c3725_t *router) |
int c3725_boot_ios(c3725_t *router) |
1219 |
{ |
{ |
1220 |
vm_instance_t *vm = router->vm; |
vm_instance_t *vm = router->vm; |
1221 |
|
cpu_mips_t *cpu; |
1222 |
|
|
1223 |
if (!vm->boot_cpu) |
if (!vm->boot_cpu) |
1224 |
return(-1); |
return(-1); |
1233 |
} |
} |
1234 |
|
|
1235 |
/* Reset the boot CPU */ |
/* Reset the boot CPU */ |
1236 |
mips64_reset(vm->boot_cpu); |
cpu = CPU_MIPS64(vm->boot_cpu); |
1237 |
|
mips64_reset(cpu); |
1238 |
|
|
1239 |
/* Load IOS image */ |
/* Load IOS image */ |
1240 |
if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image, |
if (mips64_load_elf_image(cpu,vm->ios_image, |
1241 |
(vm->ghost_status == VM_GHOST_RAM_USE), |
(vm->ghost_status == VM_GHOST_RAM_USE), |
1242 |
&vm->ios_entry_point) < 0) |
&vm->ios_entry_point) < 0) |
1243 |
{ |
{ |
1248 |
/* Launch the simulation */ |
/* Launch the simulation */ |
1249 |
printf("\nC3725 '%s': starting simulation (CPU0 PC=0x%llx), " |
printf("\nC3725 '%s': starting simulation (CPU0 PC=0x%llx), " |
1250 |
"JIT %sabled.\n", |
"JIT %sabled.\n", |
1251 |
vm->name,vm->boot_cpu->pc,vm->jit_use ? "en":"dis"); |
vm->name,cpu->pc,vm->jit_use ? "en":"dis"); |
1252 |
|
|
1253 |
vm_log(vm,"C3725_BOOT", |
vm_log(vm,"C3725_BOOT", |
1254 |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
"starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", |
1255 |
vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off"); |
cpu->pc,cpu->idle_pc,vm->jit_use ? "on":"off"); |
1256 |
|
|
1257 |
/* Start main CPU */ |
/* Start main CPU */ |
1258 |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { |
1289 |
} |
} |
1290 |
|
|
1291 |
/* Load ROM (ELF image or embedded) */ |
/* Load ROM (ELF image or embedded) */ |
1292 |
cpu0 = vm->boot_cpu; |
cpu0 = CPU_MIPS64(vm->boot_cpu); |
1293 |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
rom_entry_point = (m_uint32_t)MIPS_ROM_PC; |
1294 |
|
|
1295 |
if ((vm->rom_filename != NULL) && |
if ((vm->rom_filename != NULL) && |