/[dynamips]/trunk/memory.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Diff of /trunk/memory.h

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

upstream/dynamips-0.2.6-RC1/memory.h revision 2 by dpavlin, Sat Oct 6 16:03:58 2007 UTC upstream/dynamips-0.2.7-RC3/memory.h revision 9 by dpavlin, Sat Oct 6 16:26:06 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   * Cisco 7200 (Predator) simulation platform.   * Cisco router simulation platform.
3   * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)   * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4   */   */
5    
6  #ifndef __MEMORY_H__  #ifndef __MEMORY_H__
7  #define __MEMORY_H__  #define __MEMORY_H__
8    
 #ifndef DYNAMIPS_ASM  
9  #include <sys/types.h>  #include <sys/types.h>
10  #include "utils.h"  #include "utils.h"
 #endif  
11    
12  /* MTS operation */  /* MTS operation */
13  #define MTS_READ  0  #define MTS_READ  0
# Line 39  Line 37 
37  #define MTS_ACC_T   0x00000004   /* TLB Exception */  #define MTS_ACC_T   0x00000004   /* TLB Exception */
38  #define MTS_ACC_U   0x00000006   /* Unexistent */  #define MTS_ACC_U   0x00000006   /* Unexistent */
39    
 /* 32-bit Virtual Address seen by MTS */  
 #define MTS32_LEVEL1_BITS  10  
 #define MTS32_LEVEL2_BITS  10  
 #define MTS32_OFFSET_BITS  12  
   
 /* Each level-1 entry covers 4 Mb */  
 #define MTS32_LEVEL1_SIZE  (1 << (MTS32_LEVEL2_BITS + MTS32_OFFSET_BITS))  
 #define MTS32_LEVEL1_MASK  (MTS32_LEVEL1_SIZE - 1)  
   
 /* Each level-2 entry covers 4 Kb */  
 #define MTS32_LEVEL2_SIZE  (1 << MTS32_OFFSET_BITS)  
 #define MTS32_LEVEL2_MASK  (MTS32_LEVEL2_SIZE - 1)  
   
40  /* Hash table size for MTS64 (default: [shift:16,bits:12]) */  /* Hash table size for MTS64 (default: [shift:16,bits:12]) */
41  #define MTS64_HASH_SHIFT   15  #define MTS64_HASH_SHIFT   12
42  #define MTS64_HASH_BITS    15  #define MTS64_HASH_BITS    14
43  #define MTS64_HASH_SIZE    (1 << MTS64_HASH_BITS)  #define MTS64_HASH_SIZE    (1 << MTS64_HASH_BITS)
44  #define MTS64_HASH_MASK    (MTS64_HASH_SIZE - 1)  #define MTS64_HASH_MASK    (MTS64_HASH_SIZE - 1)
45    
46  /* MTS64 hash on virtual addresses */  /* MTS64 hash on virtual addresses */
47  #define MTS64_HASH(vaddr) (((vaddr) >> MTS64_HASH_SHIFT) & MTS64_HASH_MASK)  #define MTS64_HASH(vaddr)  (((vaddr) >> MTS64_HASH_SHIFT) & MTS64_HASH_MASK)
48    
49  /* Number of entries per chunk */  /* Hash table size for MTS32 (default: [shift:15,bits:15]) */
50  #define MTS64_CHUNK_SIZE   256  #define MTS32_HASH_SHIFT   12
51    #define MTS32_HASH_BITS    14
52    #define MTS32_HASH_SIZE    (1 << MTS32_HASH_BITS)
53    #define MTS32_HASH_MASK    (MTS32_HASH_SIZE - 1)
54    
55  #ifndef DYNAMIPS_ASM  /* MTS32 hash on virtual addresses */
56  /* MTS32: Level 1 & 2 arrays */  #define MTS32_HASH(vaddr)  (((vaddr) >> MTS32_HASH_SHIFT) & MTS32_HASH_MASK)
 typedef struct mts32_l1_array mts32_l1_array_t;  
 struct mts32_l1_array {  
    m_iptr_t entry[1 << MTS32_LEVEL1_BITS];  
 };  
57    
58  typedef struct mts32_l2_array mts32_l2_array_t;  /* Number of entries per chunk */
59  struct mts32_l2_array {  #define MTS64_CHUNK_SIZE   256
60     m_iptr_t entry[1 << MTS32_LEVEL2_BITS];  #define MTS32_CHUNK_SIZE   256
    mts32_l2_array_t *next;  
 };  
61    
62  /* MTS64: chunk definition */  /* MTS64: chunk definition */
63  struct mts64_chunk {  struct mts64_chunk {
# Line 84  struct mts64_chunk { Line 66  struct mts64_chunk {
66     u_int count;     u_int count;
67  };  };
68    
69  /* Show the last memory accesses */  /* MTS32: chunk definition */
70  void memlog_dump(cpu_mips_t *cpu);  struct mts32_chunk {
71       mts32_entry_t entry[MTS32_CHUNK_SIZE];
72  /* Allocate an L1 array */     struct mts32_chunk *next;
73  mts32_l1_array_t *mts32_alloc_l1_array(m_iptr_t val);     u_int count;
74    };
 /* Allocate an L2 array */  
 mts32_l2_array_t *mts32_alloc_l2_array(cpu_mips_t *cpu,m_iptr_t val);  
   
 /* Initialize an empty MTS32 subsystem */  
 int mts32_init_empty(cpu_mips_t *cpu);  
   
 /* Free memory used by MTS32 */  
 void mts32_shutdown(cpu_mips_t *cpu);  
   
 /* Map a physical address to the specified virtual address */  
 void mts32_map(cpu_mips_t *cpu,m_uint64_t vaddr,  
                m_uint64_t paddr,m_uint32_t len,  
                int cache_access);  
   
 /* Unmap a memory zone */  
 void mts32_unmap(cpu_mips_t *cpu,m_uint64_t vaddr,m_uint32_t len,  
                  m_uint32_t val);  
   
 /* Map all devices for kernel mode */  
 void mts32_km_map_all_dev(cpu_mips_t *cpu);  
   
 /* Initialize the MTS64 subsystem for the specified CPU */  
 int mts64_init(cpu_mips_t *cpu);  
   
 /* Free memory used by MTS64 */  
 void mts64_shutdown(cpu_mips_t *cpu);  
75    
76  /* Show MTS64 detailed information (debugging only!) */  /* Record a memory access */
77  void mts64_show_stats(cpu_mips_t *cpu);  void memlog_rec_access(cpu_gen_t *cpu,m_uint64_t vaddr,m_uint64_t data,
78                           m_uint32_t op_size,m_uint32_t op_type);
79    
80  /* Initialize memory access vectors */  /* Show the last memory accesses */
81  void mts_init_memop_vectors(cpu_mips_t *cpu);  void memlog_dump(cpu_gen_t *cpu);
82    
83  /* Shutdown MTS subsystem */  /* Update the data obtained by a read access */
84  void mts_shutdown(cpu_mips_t *cpu);  void memlog_update_read(cpu_gen_t *cpu,m_iptr_t raddr);
85    
86  /* Copy a memory block from VM physical RAM to real host */  /* Copy a memory block from VM physical RAM to real host */
87  void physmem_copy_from_vm(vm_instance_t *vm,void *real_buffer,  void physmem_copy_from_vm(vm_instance_t *vm,void *real_buffer,
# Line 146  m_uint16_t physmem_copy_u16_from_vm(vm_i Line 103  m_uint16_t physmem_copy_u16_from_vm(vm_i
103  /* Copy a 16-bit word to the VM physical RAM from real host */  /* Copy a 16-bit word to the VM physical RAM from real host */
104  void physmem_copy_u16_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint16_t val);  void physmem_copy_u16_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint16_t val);
105    
106    /* Copy a byte from the VM physical RAM to real host */
107    m_uint8_t physmem_copy_u8_from_vm(vm_instance_t *vm,m_uint64_t paddr);
108    
109    /* Copy a 16-bit word to the VM physical RAM from real host */
110    void physmem_copy_u8_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint8_t val);
111    
112  /* DMA transfer operation */  /* DMA transfer operation */
113  void physmem_dma_transfer(vm_instance_t *vm,m_uint64_t src,m_uint64_t dst,  void physmem_dma_transfer(vm_instance_t *vm,m_uint64_t src,m_uint64_t dst,
114                            size_t len);                            size_t len);
# Line 156  size_t physmem_strlen(vm_instance_t *vm, Line 119  size_t physmem_strlen(vm_instance_t *vm,
119  /* Physical memory dump (32-bit words) */  /* Physical memory dump (32-bit words) */
120  void physmem_dump_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint32_t u32_count);  void physmem_dump_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint32_t u32_count);
121    
 #endif /* DYNAMIPS_ASM */  
   
122  #endif  #endif

Legend:
Removed from v.2  
changed lines
  Added in v.9

  ViewVC Help
Powered by ViewVC 1.1.26