--- upstream/dynamips-0.2.6-RC4/dev_pa_mc8te1.c	2007/10/06 16:08:03	5
+++ upstream/dynamips-0.2.7-RC2/dev_pa_mc8te1.c	2007/10/06 16:24:54	8
@@ -1,5 +1,5 @@
 /*  
- * Cisco C7200 (Predator) Simulation Platform.
+ * Cisco router simulation platform.
  * Copyright (C) 2005-2006 Christophe Fillot.  All rights reserved.
  *
  * PA-MC-8TE1 card. Doesn't work at this time.
@@ -13,7 +13,8 @@
 #include <pthread.h>
 #include <assert.h>
 
-#include "mips64.h"
+#include "cpu.h"
+#include "vm.h"
 #include "dynamips.h"
 #include "memory.h"
 #include "device.h"
@@ -36,6 +37,7 @@
 /* PA-MC-8TE1 Data */
 struct pa_mc_data {
    char *name;
+   u_int irq;
 
    /* Virtual machine */
    vm_instance_t *vm;
@@ -50,6 +52,7 @@
    m_uint8_t ssram_data[0x20000];
 
    /* PLX9054 */
+   char *plx_name;
    vm_obj_t *plx_obj;
 
    /* NetIO descriptor */
@@ -65,7 +68,7 @@
 /*
  * dev_ssram_access
  */
-static void *dev_ssram_access(cpu_mips_t *cpu,struct vdevice *dev,
+static void *dev_ssram_access(cpu_gen_t *cpu,struct vdevice *dev,
                               m_uint32_t offset,u_int op_size,u_int op_type,
                               m_uint64_t *data)
 {
@@ -81,10 +84,11 @@
    if (op_type == MTS_READ) {
       cpu_log(cpu,d->name,
               "read  access to offset = 0x%x, pc = 0x%llx (size=%u)\n",
-              offset,cpu->pc,op_size);
+              offset,cpu_get_pc(cpu),op_size);
    } else {
       cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, "
-              "val = 0x%llx (size=%u)\n",offset,cpu->pc,*data,op_size);
+              "val = 0x%llx (size=%u)\n",
+              offset,cpu_get_pc(cpu),*data,op_size);
    }
 #endif
 
@@ -133,14 +137,14 @@
    printf("DOORBELL: 0x%x\n",val);
 
    /* Trigger interrupt */
-   vm_set_irq(pa_data->vm,2);
+   //vm_set_irq(pa_data->vm,pa_data->irq);
    vm_set_irq(pa_data->vm,3);
 }
 
 /*
  * pa_mc8te1_access()
  */
-static void *pa_mc8te1_access(cpu_mips_t *cpu,struct vdevice *dev,
+static void *pa_mc8te1_access(cpu_gen_t *cpu,struct vdevice *dev,
                               m_uint32_t offset,u_int op_size,u_int op_type,
                               m_uint64_t *data)
 {
@@ -152,10 +156,10 @@
 #if DEBUG_ACCESS
    if (op_type == MTS_READ) {
       cpu_log(cpu,d->name,"read  access to offset = 0x%x, pc = 0x%llx\n",
-              offset,cpu->pc);
+              offset,cpu_get_pc(cpu));
    } else {
       cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, "
-              "val = 0x%llx\n",offset,cpu->pc,*data);
+              "val = 0x%llx\n",offset,cpu_get_pc(cpu),*data);
    }
 #endif
 
@@ -166,11 +170,12 @@
          if (op_type == MTS_READ) {
             cpu_log(cpu,d->name,
                     "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n",
-                    offset,cpu->pc,op_size);
+                    offset,cpu_get_pc(cpu),op_size);
          } else {
             cpu_log(cpu,d->name,
                     "write to unknown addr 0x%x, value=0x%llx, "
-                    "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size);
+                    "pc=0x%llx (size=%u)\n",
+                    offset,*data,cpu_get_pc(cpu),op_size);
          }
 #endif
    }
@@ -181,7 +186,7 @@
 /*
  * pci_pos_read()
  */
-static m_uint32_t pci_pos_read(cpu_mips_t *cpu,struct pci_device *dev,int reg)
+static m_uint32_t pci_pos_read(cpu_gen_t *cpu,struct pci_device *dev,int reg)
 {
    struct pa_mc_data *d = dev->priv_data;
 
@@ -200,7 +205,7 @@
 /*
  * pci_pos_write()
  */
-static void pci_pos_write(cpu_mips_t *cpu,struct pci_device *dev,
+static void pci_pos_write(cpu_gen_t *cpu,struct pci_device *dev,
                           int reg,m_uint32_t value)
 {
    struct pa_mc_data *d = dev->priv_data;
@@ -235,6 +240,7 @@
    memset(d,0,sizeof(*d));
    d->name = name;
    d->vm   = router->vm;
+   d->irq  = c7200_net_irq_for_slot_port(pa_bay,0);
 
    /* Set the EEPROM */
    c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-MC-8TE1"));
@@ -242,7 +248,7 @@
    /* Create the PM7380 */
    d->pci_dev = pci_dev_add(router->pa_bay[pa_bay].pci_map,name,
                             0x11f8, 0x7380,
-                            0,0,C7200_NETIO_IRQ,d,
+                            0,0,d->irq,d,
                             NULL,pci_pos_read,pci_pos_write);
 
    /* Initialize SSRAM device */
@@ -253,7 +259,8 @@
    d->ssram_dev.handler   = dev_ssram_access;
 
    /* Create the PLX9054 */
-   d->plx_obj = dev_plx9054_init(d->vm,d->name,
+   d->plx_name = dyn_sprintf("%s_plx",name);
+   d->plx_obj = dev_plx9054_init(d->vm,d->plx_name,
                                  router->pa_bay[pa_bay].pci_map,1,
                                  &d->ssram_dev,NULL);