/[dynamips]/trunk/dev_gt.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Diff of /trunk/dev_gt.c

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

upstream/dynamips-0.2.7-RC1/dev_gt.c revision 7 by dpavlin, Sat Oct 6 16:23:47 2007 UTC upstream/dynamips-0.2.7-RC2/dev_gt.c revision 8 by dpavlin, Sat Oct 6 16:24:54 2007 UTC
# Line 711  void *dev_gt64120_access(cpu_gen_t *cpu, Line 711  void *dev_gt64120_access(cpu_gen_t *cpu,
711  /* Update the Ethernet port interrupt status */  /* Update the Ethernet port interrupt status */
712  static void gt_eth_update_int_status(struct gt_data *d,struct eth_port *port)  static void gt_eth_update_int_status(struct gt_data *d,struct eth_port *port)
713  {  {
714     if (port->icr & GT_ICR_MASK)     if (port->icr & port->imr & GT_ICR_MASK) {
715        port->icr |= GT_ICR_INT_SUM;        port->icr |= GT_ICR_INT_SUM;
   
    if (port->icr & port->imr & GT_ICR_MASK)  
716        vm_set_irq(d->vm,d->eth_irq);        vm_set_irq(d->vm,d->eth_irq);
717       } else {
718          port->icr &= ~GT_ICR_INT_SUM;
719          vm_clear_irq(d->vm,d->eth_irq);
720       }
721  }  }
722    
723  /* Read a MII register */  /* Read a MII register */
# Line 847  static int gt_eth_access(cpu_gen_t *cpu, Line 849  static int gt_eth_access(cpu_gen_t *cpu,
849        /* ICR: Interrupt Cause Register */        /* ICR: Interrupt Cause Register */
850        case 0x84850:        case 0x84850:
851        case 0x88850:        case 0x88850:
852           if (op_type == MTS_READ)           if (op_type == MTS_READ) {
853              *data = port->icr;              *data = port->icr;
854           else           } else {
855              port->icr &= *data;              port->icr &= *data;
856                gt_eth_update_int_status(d,port);
857             }
858           break;           break;
859    
860        /* IMR: Interrupt Mask Register */        /* IMR: Interrupt Mask Register */
861        case 0x84858:        case 0x84858:
862        case 0x88858:        case 0x88858:
863           if (op_type == MTS_READ)           if (op_type == MTS_READ) {
864              *data = port->imr;              *data = port->imr;
865           else           } else {
866              port->imr = *data;              port->imr = *data;
867                gt_eth_update_int_status(d,port);
868             }
869           break;           break;
870    
871        /* PCR: Port Configuration Register */        /* PCR: Port Configuration Register */
# Line 1196  void *dev_gt96100_access(cpu_gen_t *cpu, Line 1202  void *dev_gt96100_access(cpu_gen_t *cpu,
1202              if (gt_data->eth_ports[1].icr & GT_ICR_INT_SUM)              if (gt_data->eth_ports[1].icr & GT_ICR_INT_SUM)
1203                 *data |= GT_SCR_ETH1_SUM;                 *data |= GT_SCR_ETH1_SUM;
1204    
1205                gt_update_irq_status(gt_data);
1206              *data = swap32(*data);              *data = swap32(*data);
1207           }           }
1208           break;           break;

Legend:
Removed from v.7  
changed lines
  Added in v.8

  ViewVC Help
Powered by ViewVC 1.1.26