--- upstream/dynamips-0.2.7-RC1/dev_gt.c	2007/10/06 16:23:47	7
+++ upstream/dynamips-0.2.7-RC2/dev_gt.c	2007/10/06 16:24:54	8
@@ -711,11 +711,13 @@
 /* Update the Ethernet port interrupt status */
 static void gt_eth_update_int_status(struct gt_data *d,struct eth_port *port)
 {
-   if (port->icr & GT_ICR_MASK)
+   if (port->icr & port->imr & GT_ICR_MASK) {
       port->icr |= GT_ICR_INT_SUM;
-
-   if (port->icr & port->imr & GT_ICR_MASK)
       vm_set_irq(d->vm,d->eth_irq);
+   } else {
+      port->icr &= ~GT_ICR_INT_SUM;
+      vm_clear_irq(d->vm,d->eth_irq);
+   }
 }
 
 /* Read a MII register */
@@ -847,19 +849,23 @@
       /* ICR: Interrupt Cause Register */
       case 0x84850:
       case 0x88850:
-         if (op_type == MTS_READ)
+         if (op_type == MTS_READ) {
             *data = port->icr;
-         else
+         } else {
             port->icr &= *data;
+            gt_eth_update_int_status(d,port);
+         }
          break;
 
       /* IMR: Interrupt Mask Register */
       case 0x84858:
       case 0x88858:
-         if (op_type == MTS_READ)
+         if (op_type == MTS_READ) {
             *data = port->imr;
-         else
+         } else {
             port->imr = *data;
+            gt_eth_update_int_status(d,port);
+         }
          break;
 
       /* PCR: Port Configuration Register */
@@ -1196,6 +1202,7 @@
             if (gt_data->eth_ports[1].icr & GT_ICR_INT_SUM)
                *data |= GT_SCR_ETH1_SUM;
 
+            gt_update_irq_status(gt_data);
             *data = swap32(*data);
          }
          break;