--- upstream/dynamips-0.2.6-RC1/dev_c7200_pos.c 2007/10/06 16:03:58 2 +++ upstream/dynamips-0.2.7-RC1/dev_c7200_pos.c 2007/10/06 16:23:47 7 @@ -1,6 +1,6 @@ /* - * Cisco C7200 (Predator) Simulation Platform. - * Copyright (C) 2005-2006 Christophe Fillot. All rights reserved. + * Cisco router Simulation Platform. + * Copyright (c) 2005-2007 Christophe Fillot. All rights reserved. * * EEPROM types: * - 0x95: PA-POS-OC3SMI @@ -19,7 +19,8 @@ #include #include -#include "mips64.h" +#include "cpu.h" +#include "vm.h" #include "dynamips.h" #include "memory.h" #include "device.h" @@ -27,6 +28,7 @@ #include "net_io.h" #include "ptask.h" #include "dev_c7200.h" +#include "dev_plx.h" /* Debugging flags */ #define DEBUG_ACCESS 0 @@ -52,7 +54,6 @@ #define POS_OC3_TXDESC_WRAP 0x40000000 /* Wrap ring */ #define POS_OC3_TXDESC_CONT 0x08000000 /* Packet continues */ #define POS_OC3_TXDESC_LEN_MASK 0x1fff -#define POS_OC3_TXDESC_ADDR_MASK 0x3fffffff /* Buffer address (?) */ /* RX Descriptor */ struct rx_desc { @@ -93,26 +94,15 @@ ptask_id_t tx_tid; }; -/* EEPROM definition */ -static const m_uint16_t eeprom_pos_oc3_data[64] = { - 0x0196, 0x0202, 0xffff, 0xffff, 0x490C, 0x7806, 0x0000, 0x0000, - 0x5000, 0x0000, 0x0208, 0x1900, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF, -}; - -static const struct c7200_eeprom eeprom_pos_oc3 = { - "PA-POS-OC3MM", (m_uint16_t *)eeprom_pos_oc3_data, - sizeof(eeprom_pos_oc3_data)/2, -}; - /* Log a PA-POS-OC3 message */ #define POS_LOG(d,msg...) vm_log((d)->vm,(d)->name,msg) /* * pos_access() */ -static void *dev_pos_access(cpu_mips_t *cpu,struct vdevice *dev, - m_uint32_t offset,u_int op_size,u_int op_type, - m_uint64_t *data) +static void *dev_pos_access(cpu_gen_t *cpu,struct vdevice *dev, + m_uint32_t offset,u_int op_size,u_int op_type, + m_uint64_t *data) { struct pos_oc3_data *d = dev->priv_data; @@ -122,11 +112,11 @@ #if DEBUG_ACCESS if (op_type == MTS_READ) { cpu_log(cpu,d->name,"read access to offset = 0x%x, pc = 0x%llx\n", - offset,cpu->pc); + offset,cpu_get_pc(cpu)); } else { if (offset != 0x404) cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, " - "val = 0x%llx\n",offset,cpu->pc,*data); + "val = 0x%llx\n",offset,cpu_get_pc(cpu),*data); } #endif @@ -149,11 +139,12 @@ if (op_type == MTS_READ) { cpu_log(cpu,d->name, "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", - offset,cpu->pc,op_size); + offset,cpu_get_pc(cpu),op_size); } else { cpu_log(cpu,d->name, "write to unknown addr 0x%x, value=0x%llx, " - "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); + "pc=0x%llx (size=%u)\n", + offset,*data,cpu_get_pc(cpu),op_size); } #endif } @@ -164,7 +155,7 @@ /* * pos_rx_access() */ -static void *dev_pos_rx_access(cpu_mips_t *cpu,struct vdevice *dev, +static void *dev_pos_rx_access(cpu_gen_t *cpu,struct vdevice *dev, m_uint32_t offset,u_int op_size,u_int op_type, m_uint64_t *data) { @@ -176,10 +167,10 @@ #if DEBUG_ACCESS if (op_type == MTS_READ) { cpu_log(cpu,d->name,"read access to offset = 0x%x, pc = 0x%llx\n", - offset,cpu->pc); + offset,cpu_get_pc(cpu)); } else { cpu_log(cpu,d->name,"write access to vaddr = 0x%x, pc = 0x%llx, " - "val = 0x%llx\n",offset,cpu->pc,*data); + "val = 0x%llx\n",offset,cpu_get_pc(cpu),*data); } #endif @@ -203,11 +194,12 @@ if (op_type == MTS_READ) { cpu_log(cpu,d->rx_name, "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", - offset,cpu->pc,op_size); + offset,cpu_get_pc(cpu),op_size); } else { cpu_log(cpu,d->rx_name, "write to unknown addr 0x%x, value=0x%llx, " - "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); + "pc=0x%llx (size=%u)\n", + offset,*data,cpu_get_pc(cpu),op_size); } #endif } @@ -218,7 +210,7 @@ /* * pos_tx_access() */ -static void *dev_pos_tx_access(cpu_mips_t *cpu,struct vdevice *dev, +static void *dev_pos_tx_access(cpu_gen_t *cpu,struct vdevice *dev, m_uint32_t offset,u_int op_size,u_int op_type, m_uint64_t *data) { @@ -230,10 +222,10 @@ #if DEBUG_ACCESS if (op_type == MTS_READ) { cpu_log(cpu,d->tx_name,"read access to offset = 0x%x, pc = 0x%llx\n", - offset,cpu->pc); + offset,cpu_get_pc(cpu)); } else { cpu_log(cpu,d->tx_name,"write access to vaddr = 0x%x, pc = 0x%llx, " - "val = 0x%llx\n",offset,cpu->pc,*data); + "val = 0x%llx\n",offset,cpu_get_pc(cpu),*data); } #endif @@ -257,11 +249,12 @@ if (op_type == MTS_READ) { cpu_log(cpu,d->tx_name, "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", - offset,cpu->pc,op_size); + offset,cpu_get_pc(cpu),op_size); } else { cpu_log(cpu,d->tx_name, "write to unknown addr 0x%x, value=0x%llx, " - "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); + "pc=0x%llx (size=%u)\n", + offset,*data,cpu_get_pc(cpu),op_size); } #endif } @@ -272,7 +265,7 @@ /* * pos_cs_access() */ -static void *dev_pos_cs_access(cpu_mips_t *cpu,struct vdevice *dev, +static void *dev_pos_cs_access(cpu_gen_t *cpu,struct vdevice *dev, m_uint32_t offset,u_int op_size,u_int op_type, m_uint64_t *data) { @@ -284,10 +277,10 @@ #if DEBUG_ACCESS if (op_type == MTS_READ) { cpu_log(cpu,d->cs_name,"read access to offset = 0x%x, pc = 0x%llx\n", - offset,cpu->pc); + offset,cpu_get_pc(cpu)); } else { cpu_log(cpu,d->cs_name,"write access to vaddr = 0x%x, pc = 0x%llx, " - "val = 0x%llx\n",offset,cpu->pc,*data); + "val = 0x%llx\n",offset,cpu_get_pc(cpu),*data); } #endif @@ -309,11 +302,12 @@ if (op_type == MTS_READ) { cpu_log(cpu,d->cs_name, "read from unknown addr 0x%x, pc=0x%llx (size=%u)\n", - offset,cpu->pc,op_size); + offset,cpu_get_pc(cpu),op_size); } else { cpu_log(cpu,d->cs_name, "write to unknown addr 0x%x, value=0x%llx, " - "pc=0x%llx (size=%u)\n",offset,*data,cpu->pc,op_size); + "pc=0x%llx (size=%u)\n", + offset,*data,cpu_get_pc(cpu),op_size); } #endif } @@ -506,7 +500,8 @@ static int dev_pos_oc3_handle_txring(struct pos_oc3_data *d) { u_char pkt[POS_OC3_MAX_PKT_SIZE],*pkt_ptr; - m_uint32_t tx_start,clen,tot_len,addr; + m_uint32_t clen,tot_len,norm_len; + m_uint32_t tx_start,addr; struct tx_desc txd0,ctxd,*ptxd; int i,done = FALSE; @@ -548,11 +543,9 @@ if (clen != 0) { addr = ptxd->tdes[1]; - /* ugly hack, to allow this to work with SRAM platforms */ - if ((addr & ~POS_OC3_TXDESC_ADDR_MASK) == 0xc0000000) - addr = ptxd->tdes[1] & POS_OC3_TXDESC_ADDR_MASK; - + norm_len = normalize_size(clen,4,0); physmem_copy_from_vm(d->vm,pkt_ptr,addr,clen); + mem_bswap32(pkt_ptr,norm_len); } pkt_ptr += clen; @@ -596,7 +589,7 @@ /* * pci_pos_read() */ -static m_uint32_t pci_pos_read(cpu_mips_t *cpu,struct pci_device *dev,int reg) +static m_uint32_t pci_pos_read(cpu_gen_t *cpu,struct pci_device *dev,int reg) { struct pos_oc3_data *d = dev->priv_data; @@ -615,7 +608,7 @@ /* * pci_pos_write() */ -static void pci_pos_write(cpu_mips_t *cpu,struct pci_device *dev, +static void pci_pos_write(cpu_gen_t *cpu,struct pci_device *dev, int reg,m_uint32_t value) { struct pos_oc3_data *d = dev->priv_data; @@ -653,7 +646,7 @@ d->vm = router->vm; /* Set the EEPROM */ - c7200_pa_set_eeprom(router,pa_bay,&eeprom_pos_oc3); + c7200_pa_set_eeprom(router,pa_bay,cisco_eeprom_find_pa("PA-POS-OC3")); /* Get the appropriate PCI bus */ pci_bus = router->pa_bay[pa_bay].pci_map; @@ -664,7 +657,6 @@ d->rx_dev.name = d->rx_name; d->rx_dev.priv_data = d; d->rx_dev.handler = dev_pos_rx_access; - vm_bind_device(d->vm,&d->rx_dev); /* Initialize TX device */ d->tx_name = dyn_sprintf("%s_TX",name); @@ -672,7 +664,6 @@ d->tx_dev.name = d->tx_name; d->tx_dev.priv_data = d; d->tx_dev.handler = dev_pos_tx_access; - vm_bind_device(d->vm,&d->tx_dev); /* Initialize CS device */ d->cs_name = dyn_sprintf("%s_CS",name); @@ -680,7 +671,6 @@ d->cs_dev.name = d->cs_name; d->cs_dev.priv_data = d; d->cs_dev.handler = dev_pos_cs_access; - vm_bind_device(d->vm,&d->cs_dev); /* Initialize PLX9060 for RX part */ d->rx_obj = dev_plx9060_init(d->vm,d->rx_name,pci_bus,0,&d->rx_dev); @@ -697,7 +687,6 @@ d->dev.priv_data = d; d->dev.phys_len = 0x10000; d->dev.handler = dev_pos_access; - vm_bind_device(d->vm,&d->dev); d->pci_dev = pci_dev_add(pci_bus,name,0,0,3,0,C7200_NETIO_IRQ, d,NULL,pci_pos_read,pci_pos_write); @@ -728,7 +717,11 @@ vm_object_remove(d->vm,d->tx_obj); vm_object_remove(d->vm,d->cs_obj); - /* Remove the device from the CPU address space */ + /* Remove the devices from the CPU address space */ + vm_unbind_device(router->vm,&d->rx_dev); + vm_unbind_device(router->vm,&d->tx_dev); + vm_unbind_device(router->vm,&d->cs_dev); + vm_unbind_device(router->vm,&d->dev); cpu_group_rebuild_mts(router->vm->cpu_group);