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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr) |
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* |
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* Generic Cisco 7200 routines and definitions (EEPROM,...). |
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* |
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* Notes on IRQs (see "show stack"): |
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* |
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* - triggering IRQ 3: we get indefinitely (for each slot): |
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* "Error: Unexpected NM Interrupt received from slot: 6" |
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* |
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* - triggering IRQ 4: GT64010 reg access: probably "DMA/Timer Interrupt" |
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* |
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* - triggering IRQ 6: we get (probably "OIR/Error Interrupt") |
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* %ERR-1-PERR: PCI bus parity error |
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* %ERR-1-SERR: PCI bus system/parity error |
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* %ERR-1-FATAL: Fatal error interrupt, No reloading |
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* err_stat=0x0, err_enable=0x0, mgmt_event=0xFFFFFFFF |
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* |
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*/ |
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#ifndef __DEV_C7200_H__ |
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#define __DEV_C7200_H__ |
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#include <pthread.h> |
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#include "utils.h" |
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#include "net.h" |
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#include "device.h" |
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#include "pci_dev.h" |
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#include "nmc93cX6.h" |
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#include "dev_mv64460.h" |
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#include "net_io.h" |
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#include "vm.h" |
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/* Default C7200 parameters */ |
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#define C7200_DEFAULT_NPE_TYPE "npe-200" |
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#define C7200_DEFAULT_MIDPLANE "vxr" |
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#define C7200_DEFAULT_RAM_SIZE 256 |
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#define C7200_DEFAULT_ROM_SIZE 4 |
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#define C7200_DEFAULT_NVRAM_SIZE 128 |
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#define C7200_DEFAULT_CONF_REG 0x2102 |
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#define C7200_DEFAULT_CLOCK_DIV 4 |
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#define C7200_DEFAULT_RAM_MMAP 1 |
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#define C7200_DEFAULT_DISK0_SIZE 64 |
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#define C7200_DEFAULT_DISK1_SIZE 0 |
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/* 6 slots + 1 I/O card */ |
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#define C7200_MAX_PA_BAYS 7 |
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/* C7200 Timer IRQ (virtual) */ |
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#define C7200_VTIMER_IRQ 0 |
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/* C7200 DUART Interrupt */ |
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#define C7200_DUART_IRQ 5 |
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/* C7200 Network I/O Interrupt */ |
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#define C7200_NETIO_IRQ 2 |
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/* C7200 PA Management Interrupt handler */ |
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#define C7200_PA_MGMT_IRQ 3 |
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/* C7200 GT64k DMA/Timer Interrupt */ |
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#define C7200_GT64K_IRQ 4 |
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/* C7200 Error/OIR Interrupt */ |
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#define C7200_OIR_IRQ 6 |
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/* Network IRQ */ |
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#define C7200_NETIO_IRQ_BASE 32 |
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#define C7200_NETIO_IRQ_PORT_BITS 3 |
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#define C7200_NETIO_IRQ_PORT_MASK ((1 << C7200_NETIO_IRQ_PORT_BITS) - 1) |
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#define C7200_NETIO_IRQ_PER_SLOT (1 << C7200_NETIO_IRQ_PORT_BITS) |
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#define C7200_NETIO_IRQ_END \ |
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(C7200_NETIO_IRQ_BASE + (C7200_MAX_PA_BAYS * C7200_NETIO_IRQ_PER_SLOT) - 1) |
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/* C7200 base ram limit (256 Mb) */ |
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#define C7200_BASE_RAM_LIMIT 256 |
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/* C7200 common device addresses */ |
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#define C7200_GT64K_ADDR 0x14000000ULL |
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#define C7200_GT64K_SEC_ADDR 0x15000000ULL |
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#define C7200_BOOTFLASH_ADDR 0x1a000000ULL |
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#define C7200_NVRAM_ADDR 0x1e000000ULL |
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#define C7200_MPFPGA_ADDR 0x1e800000ULL |
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#define C7200_IOFPGA_ADDR 0x1e840000ULL |
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#define C7200_BITBUCKET_ADDR 0x1f000000ULL |
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#define C7200_ROM_ADDR 0x1fc00000ULL |
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#define C7200_IOMEM_ADDR 0x20000000ULL |
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#define C7200_SRAM_ADDR 0x4b000000ULL |
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#define C7200_BSWAP_ADDR 0xc0000000ULL |
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#define C7200_PCI_IO_ADDR 0x100000000ULL |
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/* NPE-G1 specific info */ |
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#define C7200_G1_NVRAM_ADDR 0x1e400000ULL |
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/* NPE-G2 specific info */ |
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#define C7200_G2_BSWAP_ADDR 0xc0000000ULL |
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#define C7200_G2_BOOTFLASH_ADDR 0xe8000000ULL |
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#define C7200_G2_PCI_IO_ADDR 0xf0000000ULL |
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#define C7200_G2_MV64460_ADDR 0xf1000000ULL |
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#define C7200_G2_MPFPGA_ADDR 0xfe000000ULL |
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#define C7200_G2_IOFPGA_ADDR 0xfe040000ULL |
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#define C7200_G2_NVRAM_ADDR 0xff000000ULL |
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#define C7200_G2_ROM_ADDR 0xfff00000ULL |
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/* NVRAM size for NPE-G2: 2 Mb */ |
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#define C7200_G2_NVRAM_SIZE (2 * 1048576) |
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/* Reserved space for ROM in NVRAM */ |
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#define C7200_NVRAM_ROM_RES_SIZE 2048 |
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/* C7200 physical address bus mask: keep only the lower 33 bits */ |
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#define C7200_ADDR_BUS_MASK 0x1ffffffffULL |
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/* C7200 ELF Platform ID */ |
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#define C7200_ELF_MACHINE_ID 0x19 |
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/* NPE families */ |
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enum { |
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C7200_NPE_FAMILY_MIPS = 0, |
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C7200_NPE_FAMILY_PPC, |
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}; |
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/* C7200 router */ |
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typedef struct c7200_router c7200_t; |
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/* Prototype of NPE driver initialization function */ |
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typedef int (*c7200_npe_init_fn)(c7200_t *router); |
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/* Prototype of PA driver initialization function */ |
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typedef int (*c7200_pa_init_fn)(c7200_t *router,char *name,u_int pa_bay); |
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/* Prototype of PA driver shutdown function */ |
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typedef int (*c7200_pa_shutdown_fn)(c7200_t *router,u_int pa_bay); |
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/* Prototype of PA NIO set function */ |
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typedef int (*c7200_pa_set_nio_fn)(c7200_t *router,u_int pa_bay,u_int port_id, |
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netio_desc_t *nio); |
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/* Prototype of PA NIO unset function */ |
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typedef int (*c7200_pa_unset_nio_fn)(c7200_t *router,u_int pa_bay, |
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u_int port_id); |
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/* Prototype of NM NIO show info function */ |
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typedef int (*c7200_pa_show_info_fn)(c7200_t *router,u_int pa_bay); |
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/* C7200 Port Adapter Driver */ |
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struct c7200_pa_driver { |
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char *dev_type; |
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int supported; |
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c7200_pa_init_fn pa_init; |
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c7200_pa_shutdown_fn pa_shutdown; |
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c7200_pa_set_nio_fn pa_set_nio; |
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c7200_pa_unset_nio_fn pa_unset_nio; |
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c7200_pa_show_info_fn pa_show_info; |
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}; |
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/* C7200 NIO binding to a slot/port */ |
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struct c7200_nio_binding { |
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netio_desc_t *nio; |
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u_int port_id; |
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struct c7200_nio_binding *prev,*next; |
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}; |
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/* C7200 PA bay */ |
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struct c7200_pa_bay { |
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char *dev_name; /* Device Name */ |
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char *dev_type; /* Device Type */ |
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struct cisco_eeprom eeprom; /* PA EEPROM */ |
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struct pci_bus *pci_map; /* PCI bus */ |
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struct c7200_pa_driver *pa_driver; /* PA driver */ |
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void *drv_info; /* Private driver info */ |
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struct c7200_nio_binding *nio_list; /* NIO bindings to ports */ |
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}; |
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/* C7200 NPE Driver */ |
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struct c7200_npe_driver { |
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char *npe_type; |
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int npe_family; |
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c7200_npe_init_fn npe_init; |
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int max_ram_size; |
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int supported; |
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m_uint64_t nvram_addr; |
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int iocard_required; |
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int clpd6729_pci_bus; |
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int clpd6729_pci_dev; |
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int dec21140_pci_bus; |
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int dec21140_pci_dev; |
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}; |
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/* C7200 router */ |
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struct c7200_router { |
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/* Midplane type (standard,VXR) and chassis MAC address */ |
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char *midplane_type; |
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int midplane_version; |
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n_eth_addr_t mac_addr; |
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/* Associated VM instance */ |
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vm_instance_t *vm; |
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/* MV64460 device for NPE-G2 */ |
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struct mv64460_data *mv64460_sysctr; |
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/* Midplane FPGA */ |
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struct c7200_mpfpga_data *mpfpga_data; |
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/* NPE and PA information */ |
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struct c7200_npe_driver *npe_driver; |
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struct c7200_pa_bay pa_bay[C7200_MAX_PA_BAYS]; |
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m_uint8_t oir_status; |
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/* Hidden I/O bridge hack to support PCMCIA */ |
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struct pci_bridge *io_pci_bridge; |
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struct pci_bus *pcmcia_bus; |
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/* Midplane EEPROM can be modified to change the chassis MAC address... */ |
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struct cisco_eeprom cpu_eeprom,mp_eeprom,pem_eeprom; |
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struct nmc93cX6_group sys_eeprom_g1; /* EEPROMs for CPU and Midplane */ |
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struct nmc93cX6_group sys_eeprom_g2; /* EEPROM for PEM */ |
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struct nmc93cX6_group pa_eeprom_g1; /* EEPROMs for bays 0, 1, 3, 4 */ |
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struct nmc93cX6_group pa_eeprom_g2; /* EEPROMs for bays 2, 5, 6 */ |
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}; |
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/* Initialize EEPROM groups */ |
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void c7200_init_eeprom_groups(c7200_t *router); |
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/* Create a new router instance */ |
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c7200_t *c7200_create_instance(char *name,int instance_id); |
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/* Delete a router instance */ |
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int c7200_delete_instance(char *name); |
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/* Delete all router instances */ |
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int c7200_delete_all_instances(void); |
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/* Save configuration of a C7200 instance */ |
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void c7200_save_config(c7200_t *router,FILE *fd); |
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/* Save configurations of all C7200 instances */ |
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void c7200_save_config_all(FILE *fd); |
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/* Get network IRQ for specified slot/port */ |
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u_int c7200_net_irq_for_slot_port(u_int slot,u_int port); |
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/* Set PA EEPROM definition */ |
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int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay, |
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const struct cisco_eeprom *eeprom); |
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/* Unset PA EEPROM definition (empty bay) */ |
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int c7200_pa_unset_eeprom(c7200_t *router,u_int pa_bay); |
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/* Check if a bay has a port adapter */ |
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int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay); |
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/* Get bay info */ |
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struct c7200_pa_bay *c7200_pa_get_info(c7200_t *router,u_int pa_bay); |
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/* Get PA type */ |
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char *c7200_pa_get_type(c7200_t *router,u_int pa_bay); |
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/* Get driver info about the specified slot */ |
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void *c7200_pa_get_drvinfo(c7200_t *router,u_int pa_bay); |
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/* Set driver info for the specified slot */ |
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int c7200_pa_set_drvinfo(c7200_t *router,u_int pa_bay,void *drv_info); |
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/* Add a PA binding */ |
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int c7200_pa_add_binding(c7200_t *router,char *dev_type,u_int pa_bay); |
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/* Remove a PA binding */ |
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int c7200_pa_remove_binding(c7200_t *router,u_int pa_bay); |
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/* Find a NIO binding */ |
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struct c7200_nio_binding * |
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c7200_pa_find_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id); |
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/* Add a network IO binding */ |
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int c7200_pa_add_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id, |
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char *nio_name); |
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/* Remove a NIO binding */ |
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int c7200_pa_remove_nio_binding(c7200_t *router,u_int pa_bay,u_int port_id); |
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/* Remove all NIO bindings for the specified PA */ |
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int c7200_pa_remove_all_nio_bindings(c7200_t *router,u_int pa_bay); |
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/* Enable a Network IO descriptor for a Port Adapter */ |
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int c7200_pa_enable_nio(c7200_t *router,u_int pa_bay,u_int port_id); |
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/* Disable Network IO descriptor of a Port Adapter */ |
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int c7200_pa_disable_nio(c7200_t *router,u_int pa_bay,u_int port_id); |
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/* Enable all NIO of the specified PA */ |
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int c7200_pa_enable_all_nio(c7200_t *router,u_int pa_bay); |
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/* Disable all NIO of the specified PA */ |
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int c7200_pa_disable_all_nio(c7200_t *router,u_int pa_bay); |
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/* Initialize a Port Adapter */ |
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int c7200_pa_init(c7200_t *router,u_int pa_bay); |
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/* Shutdown a Port Adapter */ |
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int c7200_pa_shutdown(c7200_t *router,u_int pa_bay); |
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/* Shutdown all PA of a router */ |
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int c7200_pa_shutdown_all(c7200_t *router); |
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/* Show info about all NMs */ |
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int c7200_pa_show_all_info(c7200_t *router); |
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/* Create a Port Adapter (command line) */ |
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int c7200_cmd_pa_create(c7200_t *router,char *str); |
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/* Add a Network IO descriptor binding (command line) */ |
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int c7200_cmd_add_nio(c7200_t *router,char *str); |
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/* Show the list of available PA drivers */ |
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void c7200_pa_show_drivers(void); |
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/* Get an NPE driver */ |
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struct c7200_npe_driver *c7200_npe_get_driver(char *npe_type); |
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| 325 |
|
|
/* Set the NPE type */ |
| 326 |
|
|
int c7200_npe_set_type(c7200_t *router,char *npe_type); |
| 327 |
|
|
|
| 328 |
|
|
/* Show the list of available NPE drivers */ |
| 329 |
|
|
void c7200_npe_show_drivers(void); |
| 330 |
|
|
|
| 331 |
|
|
/* Set Midplane type */ |
| 332 |
|
|
int c7200_midplane_set_type(c7200_t *router,char *midplane_type); |
| 333 |
|
|
|
| 334 |
|
|
/* Set chassis MAC address */ |
| 335 |
|
|
int c7200_midplane_set_mac_addr(c7200_t *router,char *mac_addr); |
| 336 |
|
|
|
| 337 |
|
|
/* Show C7200 hardware info */ |
| 338 |
|
|
void c7200_show_hardware(c7200_t *router); |
| 339 |
|
|
|
| 340 |
|
|
/* Initialize default parameters for a C7200 */ |
| 341 |
|
|
void c7200_init_defaults(c7200_t *router); |
| 342 |
|
|
|
| 343 |
|
|
/* Initialize a Cisco 7200 instance */ |
| 344 |
|
|
int c7200_init_instance(c7200_t *router); |
| 345 |
|
|
|
| 346 |
|
|
/* Stop a Cisco 7200 instance */ |
| 347 |
|
|
int c7200_stop_instance(c7200_t *router); |
| 348 |
|
|
|
| 349 |
|
|
/* Trigger an OIR event */ |
| 350 |
|
|
int c7200_trigger_oir_event(c7200_t *router,u_int slot_mask); |
| 351 |
|
|
|
| 352 |
|
|
/* Initialize a new PA while the virtual router is online (OIR) */ |
| 353 |
|
|
int c7200_pa_init_online(c7200_t *router,u_int pa_bay); |
| 354 |
|
|
|
| 355 |
|
|
/* Stop a PA while the virtual router is online (OIR) */ |
| 356 |
|
|
int c7200_pa_stop_online(c7200_t *router,u_int pa_bay); |
| 357 |
|
|
|
| 358 |
|
|
/* dev_c7200_iofpga_init() */ |
| 359 |
|
|
int dev_c7200_iofpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len); |
| 360 |
|
|
|
| 361 |
|
|
/* PA drivers */ |
| 362 |
dpavlin |
7 |
extern struct c7200_pa_driver dev_c7200_iocard_fe_driver; |
| 363 |
|
|
extern struct c7200_pa_driver dev_c7200_iocard_2fe_driver; |
| 364 |
|
|
extern struct c7200_pa_driver dev_c7200_iocard_ge_e_driver; |
| 365 |
dpavlin |
1 |
extern struct c7200_pa_driver dev_c7200_pa_fe_tx_driver; |
| 366 |
dpavlin |
7 |
extern struct c7200_pa_driver dev_c7200_pa_2fe_tx_driver; |
| 367 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_ge_driver; |
| 368 |
dpavlin |
1 |
extern struct c7200_pa_driver dev_c7200_pa_4e_driver; |
| 369 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_8e_driver; |
| 370 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_4t_driver; |
| 371 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_8t_driver; |
| 372 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_a1_driver; |
| 373 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_pos_oc3_driver; |
| 374 |
|
|
extern struct c7200_pa_driver dev_c7200_pa_4b_driver; |
| 375 |
dpavlin |
4 |
extern struct c7200_pa_driver dev_c7200_pa_mc8te1_driver; |
| 376 |
dpavlin |
1 |
|
| 377 |
|
|
#endif |
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