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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2007 Christophe Fillot (cf@utc.fr) |
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* |
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* MSFC1 Midplane FPGA. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "cpu.h" |
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#include "vm.h" |
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#include "dynamips.h" |
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#include "memory.h" |
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#include "device.h" |
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#include "nmc93cX6.h" |
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#include "dev_c6msfc1.h" |
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#define DEBUG_UNKNOWN 1 |
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#define DEBUG_ACCESS 1 |
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#define DEBUG_NET_IRQ 1 |
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/* Midplane FPGA private data */ |
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struct c6msfc1_mpfpga_data { |
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vm_obj_t vm_obj; |
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struct vdevice dev; |
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c6msfc1_t *router; |
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m_uint32_t irq_status; |
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m_uint32_t intr_enable; |
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}; |
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/* Update network interrupt status */ |
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static inline |
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void dev_c6msfc1_mpfpga_net_update_irq(struct c6msfc1_mpfpga_data *d) |
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{ |
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if (d->irq_status) { |
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vm_set_irq(d->router->vm,C6MSFC1_NETIO_IRQ); |
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} else { |
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vm_clear_irq(d->router->vm,C6MSFC1_NETIO_IRQ); |
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} |
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} |
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/* Trigger a Network IRQ for the specified slot/port */ |
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void dev_c6msfc1_mpfpga_net_set_irq(struct c6msfc1_mpfpga_data *d, |
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u_int slot,u_int port) |
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{ |
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#if DEBUG_NET_IRQ |
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vm_log(d->router->vm,"MP_FPGA","setting NetIRQ for slot %u port %u\n", |
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slot,port); |
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#endif |
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d->irq_status |= 1 << slot; |
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dev_c6msfc1_mpfpga_net_update_irq(d); |
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} |
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/* Clear a Network IRQ for the specified slot/port */ |
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void dev_c6msfc1_mpfpga_net_clear_irq(struct c6msfc1_mpfpga_data *d, |
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u_int slot,u_int port) |
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{ |
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#if DEBUG_NET_IRQ |
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vm_log(d->router->vm,"MP_FPGA","clearing NetIRQ for slot %u port %u\n", |
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slot,port); |
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#endif |
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d->irq_status &= ~(1 << slot); |
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dev_c6msfc1_mpfpga_net_update_irq(d); |
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} |
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/* |
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* dev_c6msfc1_access() |
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*/ |
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void *dev_c6msfc1_mpfpga_access(cpu_gen_t *cpu,struct vdevice *dev, |
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m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
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{ |
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struct c6msfc1_mpfpga_data *d = dev->priv_data; |
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if (op_type == MTS_READ) |
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*data = 0x0; |
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#if DEBUG_ACCESS |
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if (op_type == MTS_READ) { |
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cpu_log(cpu,"MP_FPGA","reading reg 0x%x at pc=0x%llx (size=%u)\n", |
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offset,cpu_get_pc(cpu),op_size); |
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} else { |
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cpu_log(cpu,"MP_FPGA", |
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"writing reg 0x%x at pc=0x%llx, data=0x%llx (size=%u)\n", |
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offset,cpu_get_pc(cpu),*data,op_size); |
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} |
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#endif |
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switch(offset) { |
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/* |
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* Revision + Slot: just tell we're in slot 1 (and chip rev 2) |
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* Other bits are unknown. |
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*/ |
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case 0x00: |
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if (op_type == MTS_READ) |
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*data = 0x12; |
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break; |
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/* Interrupt Control ("sh msfc") - unknown */ |
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case 0x08: |
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if (op_type == MTS_READ) |
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*data = 0x1c; |
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break; |
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/* Interrupt Enable ("sh msfc") */ |
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case 0x10: |
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if (op_type == MTS_READ) |
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*data = d->intr_enable; |
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else |
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d->intr_enable = *data; |
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break; |
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/* |
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* Read when a Network Interrupt is triggered. |
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* Bit 0: EOBC |
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* Bit 1: IBC |
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*/ |
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case 0x18: |
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case 0x1b: |
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if (op_type == MTS_READ) |
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*data = d->irq_status; |
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break; |
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#if DEBUG_UNKNOWN |
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default: |
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if (op_type == MTS_READ) { |
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cpu_log(cpu,"MP_FPGA","read from unknown addr 0x%x, pc=0x%llx\n", |
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offset,cpu_get_pc(cpu)); |
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} else { |
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cpu_log(cpu,"MP_FPGA","write to unknown addr 0x%x, value=0x%llx, " |
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"pc=0x%llx\n",offset,*data,cpu_get_pc(cpu)); |
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} |
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#endif |
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} |
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return NULL; |
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} |
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/* Shutdown the MP FPGA device */ |
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static void |
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dev_c6msfc1_mpfpga_shutdown(vm_instance_t *vm,struct c6msfc1_mpfpga_data *d) |
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{ |
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if (d != NULL) { |
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/* Remove the device */ |
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dev_remove(vm,&d->dev); |
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/* Free the structure itself */ |
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free(d); |
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} |
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} |
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/* |
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* dev_c6msfc1_mpfpga_init() |
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*/ |
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int dev_c6msfc1_mpfpga_init(c6msfc1_t *router,m_uint64_t paddr,m_uint32_t len) |
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{ |
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struct c6msfc1_mpfpga_data *d; |
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/* Allocate private data structure */ |
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if (!(d = malloc(sizeof(*d)))) { |
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fprintf(stderr,"MP_FPGA: out of memory\n"); |
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return(-1); |
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} |
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memset(d,0,sizeof(*d)); |
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d->router = router; |
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vm_object_init(&d->vm_obj); |
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d->vm_obj.name = "mp_fpga"; |
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d->vm_obj.data = d; |
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d->vm_obj.shutdown = (vm_shutdown_t)dev_c6msfc1_mpfpga_shutdown; |
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/* Set device properties */ |
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dev_init(&d->dev); |
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d->dev.name = "mp_fpga"; |
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d->dev.phys_addr = paddr; |
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d->dev.phys_len = len; |
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d->dev.handler = dev_c6msfc1_mpfpga_access; |
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d->dev.priv_data = d; |
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/* Map this device to the VM */ |
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vm_bind_device(router->vm,&d->dev); |
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vm_object_add(router->vm,&d->vm_obj); |
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return(0); |
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} |