--- upstream/dynamips-0.2.6-RC1/dev_c3600.c 2007/10/06 16:03:58 2 +++ upstream/dynamips-0.2.7-RC2/dev_c3600.c 2007/10/06 16:24:54 8 @@ -12,13 +12,16 @@ #include #include -#include "mips64.h" +#include "cpu.h" #include "dynamips.h" #include "memory.h" #include "device.h" #include "pci_io.h" +#include "dev_gt.h" #include "cisco_eeprom.h" +#include "dev_rom.h" #include "dev_c3600.h" +#include "dev_c3600_iofpga.h" #include "dev_c3600_bay.h" #include "dev_vtty.h" #include "registry.h" @@ -28,7 +31,7 @@ /* ======================================================================== */ /* Cisco 3620 mainboard EEPROM */ -static m_uint16_t eeprom_c3620_mainboard[64] = { +static m_uint16_t eeprom_c3620_mainboard_data[64] = { 0x0001, 0x0000, 0x0000, 0x0000, 0x0AFF, 0x7318, 0x5011, 0x0020, 0x0000, 0x0000, 0xA0FF, 0x9904, 0x19FF, 0xFFFF, 0xFFFF, 0x0002, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, @@ -39,8 +42,14 @@ 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, }; +struct cisco_eeprom eeprom_c3620_mainboard = { + "C3620 Mainboard", + eeprom_c3620_mainboard_data, + sizeof(eeprom_c3620_mainboard_data)/2, +}; + /* Cisco 3640 mainboard EEPROM */ -static m_uint16_t eeprom_c3640_mainboard[64] = { +static m_uint16_t eeprom_c3640_mainboard_data[64] = { 0x0001, 0x0000, 0x0000, 0x0000, 0x0AFF, 0x7316, 0x8514, 0x0040, 0x0000, 0x0000, 0xA1FF, 0x0102, 0x22FF, 0xFFFF, 0xFFFF, 0x0002, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, @@ -51,8 +60,14 @@ 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, }; +struct cisco_eeprom eeprom_c3640_mainboard = { + "C3640 Mainboard", + eeprom_c3640_mainboard_data, + sizeof(eeprom_c3640_mainboard_data)/2, +}; + /* Cisco 3660 backplane EEPROM */ -static m_uint16_t eeprom_c3660_backplane[64] = { +static m_uint16_t eeprom_c3660_backplane_data[64] = { 0x04FF, 0x4000, 0xC841, 0x0100, 0xC046, 0x0320, 0x0012, 0x8402, 0x4243, 0x3080, 0x0000, 0x0000, 0x0202, 0xC18B, 0x4841, 0x4430, 0x3434, 0x3431, 0x3135, 0x4A03, 0x0081, 0x0000, 0x0000, 0x0400, @@ -63,6 +78,12 @@ 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, }; +struct cisco_eeprom eeprom_c3660_backplane = { + "C3660 Backplane", + eeprom_c3660_backplane_data, + sizeof(eeprom_c3660_backplane_data)/2, +}; + /* ======================================================================== */ /* Chassis Drivers */ /* ======================================================================== */ @@ -71,14 +92,10 @@ static int c3660_init(c3600_t *router); static struct c3600_chassis_driver chassis_drivers[] = { - { "3620" , 3620, 1, c3620_init, - eeprom_c3620_mainboard, sizeof(eeprom_c3620_mainboard)/2 }, - { "3640" , 3640, 1, c3640_init, - eeprom_c3640_mainboard, sizeof(eeprom_c3640_mainboard)/2 }, - { "3660" , 3660, 1, c3660_init, - eeprom_c3660_backplane, sizeof(eeprom_c3660_backplane)/2 }, - - { NULL , -1, 0, NULL }, + { "3620" , 3620, 1, c3620_init, &eeprom_c3620_mainboard }, + { "3640" , 3640, 1, c3640_init, &eeprom_c3640_mainboard }, + { "3660" , 3660, 1, c3660_init, &eeprom_c3660_backplane }, + { NULL , -1, 0, NULL, NULL }, }; /* ======================================================================== */ @@ -100,18 +117,32 @@ /* Directly extract the configuration from the NVRAM device */ ssize_t c3600_nvram_extract_config(vm_instance_t *vm,char **buffer) -{ +{ + u_char *base_ptr,*ios_ptr,*cfg_ptr,*end_ptr; + m_uint32_t start,nvlen; + m_uint16_t magic1,magic2; struct vdevice *nvram_dev; - m_uint32_t start,end,clen,nvlen; - m_uint16_t magic1,magic2; - m_uint64_t addr; + off_t nvram_size; + int fd; - if (!(nvram_dev = dev_get_by_name(vm,"nvram"))) + if ((nvram_dev = dev_get_by_name(vm,"nvram"))) + dev_sync(nvram_dev); + + fd = vm_mmap_open_file(vm,"nvram",&base_ptr,&nvram_size); + + if (fd == -1) return(-1); - addr = nvram_dev->phys_addr + vm->nvram_rom_space; - magic1 = physmem_copy_u16_from_vm(vm,addr+0x06); - magic2 = physmem_copy_u16_from_vm(vm,addr+0x08); + ios_ptr = base_ptr + vm->nvram_rom_space; + end_ptr = base_ptr + nvram_size; + + if ((ios_ptr + 0x30) >= end_ptr) { + vm_error(vm,"NVRAM file too small\n"); + return(-1); + } + + magic1 = ntohs(*PTR_ADJUST(m_uint16_t *,ios_ptr,0x06)); + magic2 = ntohs(*PTR_ADJUST(m_uint16_t *,ios_ptr,0x08)); if ((magic1 != 0xF0A5) || (magic2 != 0xABCD)) { vm_error(vm,"unable to find IOS magic numbers (0x%x,0x%x)!\n", @@ -119,63 +150,66 @@ return(-1); } - start = physmem_copy_u32_from_vm(vm,addr+0x10) + 1; - end = physmem_copy_u32_from_vm(vm,addr+0x14); - nvlen = physmem_copy_u32_from_vm(vm,addr+0x18); - clen = end - start; + start = ntohl(*PTR_ADJUST(m_uint32_t *,ios_ptr,0x10)) + 1; + nvlen = ntohl(*PTR_ADJUST(m_uint32_t *,ios_ptr,0x18)); - if ((clen + 1) != nvlen) { - vm_error(vm,"invalid configuration size (0x%x)\n",nvlen); + if (!(*buffer = malloc(nvlen+1))) { + vm_error(vm,"unable to allocate config buffer (%u bytes)\n",nvlen); return(-1); } - if (!(*buffer = malloc(clen+1))) { - vm_error(vm,"unable to allocate config buffer (%u bytes)\n",clen); + cfg_ptr = ios_ptr + start + 0x08; + + if ((cfg_ptr + nvlen) > end_ptr) { + vm_error(vm,"NVRAM file too small\n"); return(-1); } - physmem_copy_from_vm(vm,*buffer,addr+start+0x08,clen); - (*buffer)[clen] = 0; - return(clen); + memcpy(*buffer,cfg_ptr,nvlen-1); + (*buffer)[nvlen-1] = 0; + return(nvlen-1); } /* Directly push the IOS configuration to the NVRAM device */ int c3600_nvram_push_config(vm_instance_t *vm,char *buffer,size_t len) { - struct vdevice *nvram_dev; - m_uint64_t addr,cfg_addr; - m_uint32_t tmp,cfg_offset; - m_uint32_t cklen; + u_char *base_ptr,*ios_ptr,*cfg_ptr; + m_uint32_t cfg_offset,cklen,tmp; m_uint16_t cksum; + int fd; + + fd = vm_mmap_create_file(vm,"nvram",vm->nvram_size*1024,&base_ptr); - if (!(nvram_dev = dev_get_by_name(vm,"nvram"))) + if (fd == -1) return(-1); - addr = nvram_dev->phys_addr + vm->nvram_rom_space; cfg_offset = 0x2c; - cfg_addr = addr + cfg_offset; + ios_ptr = base_ptr + vm->nvram_rom_space; + cfg_ptr = ios_ptr + cfg_offset; /* Write IOS tag, uncompressed config... */ - physmem_copy_u16_to_vm(vm,addr+0x06,0xF0A5); - physmem_copy_u16_to_vm(vm,addr+0x08,0xABCD); /* Magic number */ - physmem_copy_u16_to_vm(vm,addr+0x0a,0x0001); /* ??? */ - physmem_copy_u16_to_vm(vm,addr+0x0c,0x0000); /* Checksum */ - physmem_copy_u16_to_vm(vm,addr+0x0e,0x0c04); /* IOS version */ + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x06) = htons(0xF0A5); + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x08) = htons(0xABCD); + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0a) = htons(0x0001); + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0c) = htons(0x0000); + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0e) = htons(0x0c04); /* Store file contents to NVRAM */ - physmem_copy_to_vm(vm,buffer,cfg_addr,len); + memcpy(cfg_ptr,buffer,len); /* Write config addresses + size */ - tmp = cfg_addr - addr - 0x08; + tmp = cfg_offset - 0x08; - physmem_copy_u32_to_vm(vm,addr+0x10,tmp); - physmem_copy_u32_to_vm(vm,addr+0x14,tmp + len); - physmem_copy_u32_to_vm(vm,addr+0x18,len); + *PTR_ADJUST(m_uint32_t *,ios_ptr,0x10) = htonl(tmp); + *PTR_ADJUST(m_uint32_t *,ios_ptr,0x14) = htonl(tmp + len); + *PTR_ADJUST(m_uint32_t *,ios_ptr,0x18) = htonl(len); /* Compute the checksum */ - cklen = nvram_dev->phys_len - (vm->nvram_rom_space + 0x08); - cksum = nvram_cksum(vm,addr+0x08,cklen); - physmem_copy_u16_to_vm(vm,addr+0x0c,cksum); + cklen = (vm->nvram_size*1024) - (vm->nvram_rom_space + 0x08); + cksum = nvram_cksum((m_uint16_t *)(ios_ptr+0x08),cklen); + *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0c) = htons(cksum); + + vm_mmap_close_file(fd,base_ptr,vm->nvram_size*1024); return(0); } @@ -232,6 +266,9 @@ /* Shutdown all Network Modules */ c3600_nm_shutdown_all(router); + /* Free mainboard EEPROM */ + cisco_eeprom_free(&router->mb_eeprom); + /* Free all resources used by VM */ vm_free(vm); @@ -307,22 +344,40 @@ registry_foreach_type(OBJ_TYPE_VM,c3600_reg_save_config,fd,NULL); } +/* Get slot/port corresponding to specified network IRQ */ +static inline void +c3600_net_irq_get_slot_port(u_int irq,u_int *slot,u_int *port) +{ + irq -= C3600_NETIO_IRQ_BASE; + *port = irq & C3600_NETIO_IRQ_PORT_MASK; + *slot = irq >> C3600_NETIO_IRQ_PORT_BITS; +} + +/* Get network IRQ for specified slot/port */ +u_int c3600_net_irq_for_slot_port(u_int slot,u_int port) +{ + u_int irq; + + irq = (slot << C3600_NETIO_IRQ_PORT_BITS) + port; + irq += C3600_NETIO_IRQ_BASE; + + return(irq); +} + /* Set NM EEPROM definition */ int c3600_nm_set_eeprom(c3600_t *router,u_int nm_bay, - const struct c3600_eeprom *eeprom) + const struct cisco_eeprom *eeprom) { if (nm_bay >= C3600_MAX_NM_BAYS) { vm_error(router->vm,"c3600_nm_set_eeprom: invalid NM Bay %u.\n",nm_bay); return(-1); } - /* 3620/3640 */ - router->nm_bay[nm_bay].eeprom_data = eeprom->data; - router->nm_bay[nm_bay].eeprom_data_len = eeprom->len; - - /* 3660 */ - router->c3660_nm_eeprom_def[nm_bay].data = eeprom->data; - router->c3660_nm_eeprom_def[nm_bay].data_len = eeprom->len; + if (cisco_eeprom_copy(&router->nm_bay[nm_bay].eeprom,eeprom) == -1) { + vm_error(router->vm,"c3600_nm_set_eeprom: no memory.\n"); + return(-1); + } + return(0); } @@ -334,13 +389,7 @@ return(-1); } - /* 3620/3640 */ - router->nm_bay[nm_bay].eeprom_data = NULL; - router->nm_bay[nm_bay].eeprom_data_len = 0; - - /* 3660 */ - router->c3660_nm_eeprom_def[nm_bay].data = NULL; - router->c3660_nm_eeprom_def[nm_bay].data_len = 0; + cisco_eeprom_free(&router->nm_bay[nm_bay].eeprom); return(0); } @@ -350,7 +399,7 @@ if (nm_bay >= C3600_MAX_NM_BAYS) return(FALSE); - return((router->nm_bay[nm_bay].eeprom_data != NULL) ? TRUE : FALSE); + return(cisco_eeprom_valid(&router->nm_bay[nm_bay].eeprom)); } /* Get bay info */ @@ -671,7 +720,7 @@ snprintf(bay->dev_name,len,"%s(%u)",bay->dev_type,nm_bay); /* Initialize NM driver */ - if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == 1) { + if (bay->nm_driver->nm_init(router,bay->dev_name,nm_bay) == -1) { vm_error(router->vm,"unable to initialize NM %u.\n",nm_bay); return(-1); } @@ -950,30 +999,29 @@ } /* Set the base MAC address of the chassis */ -static int c3600_burn_mac_addr(m_uint16_t *data,size_t data_len, - n_eth_addr_t *addr) +static int c3600_burn_mac_addr(c3600_t *router,n_eth_addr_t *addr) { m_uint8_t eeprom_ver; size_t offset; /* Read EEPROM format version */ - cisco_eeprom_get_byte(data,data_len,0,&eeprom_ver); + cisco_eeprom_get_byte(&router->mb_eeprom,0,&eeprom_ver); switch(eeprom_ver) { case 0: - cisco_eeprom_set_region(data,data_len,2,addr->eth_addr_byte,6); + cisco_eeprom_set_region(&router->mb_eeprom,2,addr->eth_addr_byte,6); break; case 4: - if (!cisco_eeprom_v4_find_field(data,data_len,0xC3,&offset)) { - cisco_eeprom_set_region(data,data_len,offset, + if (!cisco_eeprom_v4_find_field(&router->mb_eeprom,0xC3,&offset)) { + cisco_eeprom_set_region(&router->mb_eeprom,offset, addr->eth_addr_byte,6); } break; default: - fprintf(stderr,"c3600_burn_mac_addr: unable to handle " - "EEPROM version %u\n",eeprom_ver); + vm_error(router->vm,"c3600_burn_mac_addr: unable to handle " + "EEPROM version %u\n",eeprom_ver); return(-1); } @@ -989,8 +1037,7 @@ } /* Set the chassis base MAC address */ - c3600_burn_mac_addr(router->mb_eeprom_data,sizeof(router->mb_eeprom_data), - &router->mac_addr); + c3600_burn_mac_addr(router,&router->mac_addr); return(0); } @@ -1012,14 +1059,13 @@ router->chassis_driver = driver; /* Copy the mainboard EEPROM */ - memcpy(router->mb_eeprom_data,driver->mb_eeprom,driver->mb_eeprom_len << 1); + if (cisco_eeprom_copy(&router->mb_eeprom,driver->eeprom) == -1) { + vm_error(router->vm,"unable to set chassis EEPROM '%s'.\n",chassis_type); + return(-1); + } /* Set the chassis base MAC address */ - c3600_burn_mac_addr(router->mb_eeprom_data,sizeof(router->mb_eeprom_data), - &router->mac_addr); - - router->mb_eeprom.data = router->mb_eeprom_data; - router->mb_eeprom.data_len = driver->mb_eeprom_len; + c3600_burn_mac_addr(router,&router->mac_addr); return(0); } @@ -1084,7 +1130,7 @@ int i; /* Set the processor type: R4700 */ - mips64_set_prid(vm->boot_cpu,MIPS_PRID_R4700); + mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R4700); /* Initialize the Galileo GT-64010 PCI controller */ if (c3600_init_gt64010(router) == -1) @@ -1106,7 +1152,7 @@ int i; /* Set the processor type: R4700 */ - mips64_set_prid(vm->boot_cpu,MIPS_PRID_R4700); + mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R4700); /* Initialize the Galileo GT-64010 PCI controller */ if (c3600_init_gt64010(router) == -1) @@ -1141,7 +1187,7 @@ int i; /* Set the processor type: R5271 */ - mips64_set_prid(vm->boot_cpu,MIPS_PRID_R527x); + mips64_set_prid(CPU_MIPS64(vm->boot_cpu),MIPS_PRID_R527x); /* Initialize the Galileo GT-64120 PCI controller */ if (c3600_init_gt64120(router) == -1) @@ -1208,7 +1254,7 @@ /* Generate a chassis MAC address based on the instance ID */ m = &router->mac_addr; - m->eth_addr_byte[0] = 0xCC; + m->eth_addr_byte[0] = vm_get_mac_addr_msb(vm); m->eth_addr_byte[1] = vm->instance_id & 0xFF; m->eth_addr_byte[2] = pid >> 8; m->eth_addr_byte[3] = pid & 0xFF; @@ -1222,13 +1268,17 @@ vm->ram_size = C3600_DEFAULT_RAM_SIZE; vm->rom_size = C3600_DEFAULT_ROM_SIZE; vm->nvram_size = C3600_DEFAULT_NVRAM_SIZE; - vm->conf_reg = C3600_DEFAULT_CONF_REG; + vm->conf_reg_setup = C3600_DEFAULT_CONF_REG; vm->clock_divisor = C3600_DEFAULT_CLOCK_DIV; vm->nvram_rom_space = C3600_NVRAM_ROM_RES_SIZE; router->nm_iomem_size = C3600_DEFAULT_IOMEM_SIZE; vm->pcmcia_disk_size[0] = C3600_DEFAULT_DISK0_SIZE; vm->pcmcia_disk_size[1] = C3600_DEFAULT_DISK1_SIZE; + + /* Enable NVRAM operations to load/store configs */ + vm->nvram_extract_config = c3600_nvram_extract_config; + vm->nvram_push_config = c3600_nvram_push_config; } /* Initialize the C3600 Platform */ @@ -1237,6 +1287,8 @@ vm_instance_t *vm = router->vm; struct c3600_nm_bay *nm_bay; cpu_mips_t *cpu; + cpu_gen_t *gen; + vm_obj_t *obj; int i; /* Copy config register setup into "active" config register */ @@ -1249,17 +1301,24 @@ vm->cpu_group = cpu_group_create("System CPU"); /* Initialize the virtual MIPS processor */ - if (!(cpu = cpu_create(vm,0))) { + if (!(gen = cpu_create(vm,CPU_TYPE_MIPS64,0))) { vm_error(vm,"unable to create CPU!\n"); return(-1); } + cpu = CPU_MIPS64(gen); + /* Add this CPU to the system CPU group */ - cpu_group_add(vm->cpu_group,cpu); - vm->boot_cpu = cpu; + cpu_group_add(vm->cpu_group,gen); + vm->boot_cpu = gen; + + /* Initialize the IRQ routing vectors */ + vm->set_irq = mips64_vm_set_irq; + vm->clear_irq = mips64_vm_clear_irq; /* Mark the Network IO interrupt as high priority */ cpu->irq_idle_preempt[C3600_NETIO_IRQ] = TRUE; + cpu->irq_idle_preempt[C3600_GT64K_IRQ] = TRUE; cpu->irq_idle_preempt[C3600_DUART_IRQ] = TRUE; /* Copy some parameters from VM to CPU (idle PC, ...) */ @@ -1291,6 +1350,11 @@ if (dev_c3600_iofpga_init(router,C3600_IOFPGA_ADDR,0x40000) == -1) return(-1); + if (!(obj = vm_object_find(router->vm,"io_fpga"))) + return(-1); + + router->iofpga_data = obj->data; + /* PCI IO space */ if (!(vm->pci_io_space = pci_io_data_init(vm,C3600_PCI_IO_ADDR))) return(-1); @@ -1300,15 +1364,17 @@ return(-1); /* Initialize RAM */ - dev_ram_init(vm,"ram",vm->ram_mmap,0x00000000ULL,vm->ram_size*1048576); + vm_ram_init(vm,0x00000000ULL); /* Initialize ROM */ if (!vm->rom_filename) { /* use embedded ROM */ - dev_rom_init(vm,"rom",C3600_ROM_ADDR,vm->rom_size*1048576); + dev_rom_init(vm,"rom",C3600_ROM_ADDR,vm->rom_size*1048576, + mips64_microcode,mips64_microcode_len); } else { /* use alternate ROM */ - dev_ram_init(vm,"rom",TRUE,C3600_ROM_ADDR,vm->rom_size*1048576); + dev_ram_init(vm,"rom",TRUE,TRUE,NULL,FALSE, + C3600_ROM_ADDR,vm->rom_size*1048576); } /* Initialize the NS16552 DUART */ @@ -1332,10 +1398,6 @@ } } - /* Enable NVRAM operations to load/store configs */ - vm->nvram_extract_config = c3600_nvram_extract_config; - vm->nvram_push_config = c3600_nvram_push_config; - /* Show device list */ c3600_show_hardware(router); return(0); @@ -1345,6 +1407,7 @@ int c3600_boot_ios(c3600_t *router) { vm_instance_t *vm = router->vm; + cpu_mips_t *cpu; if (!vm->boot_cpu) return(-1); @@ -1359,10 +1422,12 @@ } /* Reset the boot CPU */ - mips64_reset(vm->boot_cpu); + cpu = CPU_MIPS64(vm->boot_cpu); + mips64_reset(cpu); /* Load IOS image */ - if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image, + if (mips64_load_elf_image(cpu,vm->ios_image, + (vm->ghost_status == VM_GHOST_RAM_USE), &vm->ios_entry_point) < 0) { vm_error(vm,"failed to load Cisco IOS image '%s'.\n",vm->ios_image); @@ -1372,18 +1437,63 @@ /* Launch the simulation */ printf("\nC3600 '%s': starting simulation (CPU0 PC=0x%llx), " "JIT %sabled.\n", - vm->name,vm->boot_cpu->pc,vm->jit_use ? "en":"dis"); + vm->name,cpu->pc,vm->jit_use ? "en":"dis"); vm_log(vm,"C3600_BOOT", "starting instance (CPU0 PC=0x%llx,idle_pc=0x%llx,JIT %s)\n", - vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off"); + cpu->pc,cpu->idle_pc,vm->jit_use ? "on":"off"); /* Start main CPU */ - vm->status = VM_STATUS_RUNNING; - cpu_start(vm->boot_cpu); + if (vm->ghost_status != VM_GHOST_RAM_GENERATE) { + vm->status = VM_STATUS_RUNNING; + cpu_start(vm->boot_cpu); + } else { + vm->status = VM_STATUS_SHUTDOWN; + } return(0); } +/* Set an IRQ */ +static void c3600_set_irq(vm_instance_t *vm,u_int irq) +{ + c3600_t *router = VM_C3600(vm); + cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); + u_int slot,port; + + switch(irq) { + case 0 ... 7: + mips64_set_irq(cpu0,irq); + + if (cpu0->irq_idle_preempt[irq]) + cpu_idle_break_wait(cpu0->gen); + break; + + case C3600_NETIO_IRQ_BASE ... C3600_NETIO_IRQ_END: + c3600_net_irq_get_slot_port(irq,&slot,&port); + dev_c3600_iofpga_net_set_irq(router->iofpga_data,slot,port); + break; + } +} + +/* Clear an IRQ */ +static void c3600_clear_irq(vm_instance_t *vm,u_int irq) +{ + c3600_t *router = VM_C3600(vm); + cpu_mips_t *cpu0 = CPU_MIPS64(vm->boot_cpu); + u_int slot,port; + + switch(irq) { + case 0 ... 7: + mips64_clear_irq(cpu0,irq); + break; + + case C3600_NETIO_IRQ_BASE ... C3600_NETIO_IRQ_END: + c3600_net_irq_get_slot_port(irq,&slot,&port); + dev_c3600_iofpga_net_clear_irq(router->iofpga_data,slot,port); + break; + } +} + /* Initialize a Cisco 3600 instance */ int c3600_init_instance(c3600_t *router) { @@ -1402,6 +1512,10 @@ return(-1); } + /* IRQ routing */ + vm->set_irq = c3600_set_irq; + vm->clear_irq = c3600_clear_irq; + /* Load IOS configuration file */ if (vm->ios_config != NULL) { vm_nvram_push_config(vm,vm->ios_config); @@ -1409,11 +1523,11 @@ } /* Load ROM (ELF image or embedded) */ - cpu0 = vm->boot_cpu; + cpu0 = CPU_MIPS64(vm->boot_cpu); rom_entry_point = (m_uint32_t)MIPS_ROM_PC; if ((vm->rom_filename != NULL) && - (mips64_load_elf_image(cpu0,vm->rom_filename,&rom_entry_point) < 0)) + (mips64_load_elf_image(cpu0,vm->rom_filename,0,&rom_entry_point) < 0)) { vm_error(vm,"unable to load alternate ROM '%s', " "fallback to embedded ROM.\n\n",vm->rom_filename);